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SMSC USB2512Ai 4.2.2 I2C EEPROM, 4.2.1.22Register FFh: Status/Command, 4.2.2.1Implementation Characteristics, 4.2.2.2Pull-UpResistor, 4.2.2.3I2C EEPROM Slave Address

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Industrial Temperature Rated USB 2.0 Hi-Speed 2-Port Hub Controller

Datasheet

4.2.1.22Register FFh: Status/Command

BIT
NUMBER	BIT NAME	DESCRIPTION

7:3	Reserved	Reserved

2	INTF_PW_DN	SMBus Interface Power Down
		‘0’ = Interface is active
		‘1’ = Interface power down after ACk has completed

1	RESET	Reset the SMBus Interface and internal memory back to RESET_N
		assertion default settings.
		‘0’ = Normal Run/Idle State
		‘1’ = Force a reset of registers to their default state

0	USB_ATTACH	USB Attach (and write protect)
		‘0’ = SMBus slave interface is active
		‘1’ = Hub will signal a USB attach event to an upstream device, and the
		internal memory (address range 00h-FEh) is “write-protected” to prevent
		unintentional data corruption.

4.2.2 I2C EEPROM

The I2C EEPROM interface implements a subset of the I2C Master Specification (Please refer to the Philips Semiconductor Standard I2C-Bus Specification for details on I2C bus protocols). The Hub’s I2C EEPROM interface is designed to attach to a single “dedicated” I2C EEPROM, and it conforms to the Standard-mode I2C Specification (100kbit/s transfer rate and 7-bit addressing) for protocol and electrical compatibility.

Note: Extensions to the I2C Specification are not supported.

The Hub acts as the master and generates the serial clock SCL, controls the bus access (determines which device acts as the transmitter and which device acts as the receiver), and generates the START and STOP conditions.

4.2.2.1Implementation Characteristics

The Hub will only access an EEPROM using the Sequential Read Protocol.

4.2.2.2Pull-Up Resistor

The Circuit board designer is required to place external pull-up resistors (10KΩ recommended) on the SDA/SMBDATA & SCL/SMBCLK/CFG_SELO lines (per SMBus 1.0 Specification, and EEPROM manufacturer guidelines) to Vcc in order to assure proper operation.

4.2.2.3I2C EEPROM Slave Address

Slave address is 1010000.

Note: 10-bit addressing is NOT supported.

Revision 1.97 (08-11-08)	24	SMSC USB2512Ai
	DATASHEET

Contents

USB2512Ai PRODUCT FEATURES General Description General Features Hardware Features ORDER NUMBER: USB2512Ai-AEZGFOR 36 PIN, QFN LEAD-FREEROHS COMPLIANT PACKAGE Table of Contents Chapter List of Figures List of Tables Chapter 1 Pin Configuration Chapter 2 Block Diagram Chapter 3 Pin Descriptions 3.1Pin Descriptions Table 3.1 USB2512Ai Pin Descriptions (continued) SERIAL PORT INTERFACE MISC Page Table 3.2 SMBus or EEPROM Interface Behavior CFG_SEL1 CFG_SEL0 SMBUS OR EEPROM INTERFACE BEHAVIOR Table 3.3 Power, Ground, and No Connect 3.2Buffer Type Descriptions Chapter 4 Configuration Options 4.12-PortHub 4.1.1Hub Configuration Options 4.1.1.1Power Switching Polarity 4.1.2VBus Detect 4.2.1.1Register 00h: Vendor ID (LSB) 4.2.1.2Register 01h: Vendor ID (MSB) 4.2.1.3Register 02h: Product ID (LSB) 4.2.1.4Register 03h: Product ID (MSB) 4.2.1.5Register 04h: Device ID (LSB) 4.2.1.6Register 05h: Device ID (MSB) 4.2.1.7Register 06h: CONFIG_BYTE_1 4.2.1.8Register 07h: Configuration Data Byte 4.2.1.9Register 08h: Configuration Data Byte 4.2.1.10Register 09h: Non-RemovableDevice Register 0Ah: Port Disable For Self-PoweredOperation 4.2.1.12Register 0Bh: Port Disable For Bus-PoweredOperation 4.2.1.13Register 0Ch: Max Power For Self-PoweredOperation 4.2.1.14Register 0Dh: Max Power For Bus-PoweredOperation 4.2.1.15Register 0Eh: Hub Controller Max Current For Self-PoweredOperation 4.2.1.16Register 0Fh: Hub Controller Max Current For Bus-PoweredOperation 4.2.1.17Register 10h: Power-OnTime 4.2.1.18Register F6h: Boost_Up 4.2.1.19Register F8h: Boost_2:0 4.2.1.20Register FAh: Port Swap Register FBh: Port Remap 4.2.1.22Register FFh: Status/Command 4.2.2 I2C EEPROM 4.2.2.1Implementation Characteristics 4.2.2.2Pull-UpResistor 4.2.2.3I2C EEPROM Slave Address 4.2.3In-CircuitEEPROM Programming 4.3SMBus Slave Interface 4.3.1Bus Protocols 4.3.1.1Block Read/Write 4.3.2Invalid Protocol Response Behavior 4.3.3General Call Address Response 4.3.4Slave Device Time-Out 4.3.5Stretching the SCLK Signal 4.3.6SMBus Timing 4.4Default Configuration Option: 4.5Default Strapping Options: 4.6Reset 4.6.1Internal POR Hardware Reset 4.6.2External Hardware RESET_N 4.6.2.1RESET_N for Strapping Option Configuration 4.6.2.2RESET_N for EEPROM Configuration 4.6.2.3RESET_N for SMBus Slave Configuration 4.6.3USB Bus Reset Page Chapter 5 DC Parameters 5.1Maximum Guaranteed Ratings 5.2Operating Conditions Table 5.1 DC Electrical Characteristics (continued) ICLK Input Buffer O12, I/O12 &I/OSD12 Type Buffer IO-U CAPACITANCE TA = 25°C; fc = 1MHz; VDD18, VDDPLL Chapter 6 AC Specifications 6.1Oscillator/Clock 6.1.1SMBus Interface: 6.1.2I2C EEPROM: 6.1.3USB RevisionChapter 7 Package Outline