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SMSC USB2512Ai 4.2.1.19Register F8h: Boost_2:0, 4.2.1.20Register FAh: Port Swap

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Industrial Temperature Rated USB 2.0 Hi-Speed 2-Port Hub Controller

Datasheet

4.2.1.19Register F8h: Boost_2:0

BIT
NUMBER	BIT NAME		DESCRIPTION

7:4	Reserved	Reserved

3:2	BOOST_IOUT_2	USB electrical signaling drive strength Boost Bit for Downstream Port ‘2’.
		‘00’ = Normal electrical drive strength = No boost
		‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
		‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
		‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
		Note:	“Boost” could result in non-USB Compliant parameters (one
			example would be Test J/K levels), OEM should use a ‘00’ value
			unless specific implementation issues require additional signal
			boosting to correct for degraded USB signalling levels.

1:0	BOOST_IOUT_1	USB electrical signaling drive strength Boost Bit for Downstream Port ‘1’.
		‘00’ = Normal electrical drive strength = No boost
		‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
		‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
		‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
		Note:	“Boost” could result in non-USB Compliant parameters (one
			example would be Test J/K levels), OEM should use a ‘00’ value
			unless specific implementation issues require additional signal
			boosting to correct for degraded USB signalling levels.

4.2.1.20Register FAh: Port Swap

BIT
NUMBER	BIT NAME	DESCRIPTION

7:0	PRTSP	Port Swap: Swaps the Upstream and Downstream USB DP and DM Pins for
		ease of board routing to devices and connectors.
		‘0’ = USB D+ functionality is associated with the DP pin and D- functionality
		is associated with the DM pin.
		‘1’ = USB D+ functionality is associated with the DM pin and D- functionality
		is associated with the DP pin.
		Bit 7= Reserved
		Bit 6= Reserved
		Bit 5= Reserved
		Bit 4= Reserved
		Bit 3= Reserved
		Bit 2= ‘1’; Port 2 DP/DM is Swapped.
		Bit 1= ‘1’: Port 1 DP/DM is Swapped.
		Bit 0= ‘1’:Upstream Port DP/DM is Swapped

Revision 1.97 (08-11-08)	22	SMSC USB2512Ai
	DATASHEET

Contents

USB2512Ai PRODUCT FEATURES General Description General Features Hardware Features ORDER NUMBER: USB2512Ai-AEZGFOR 36 PIN, QFN LEAD-FREEROHS COMPLIANT PACKAGE Table of Contents Chapter List of Figures List of Tables Chapter 1 Pin Configuration Chapter 2 Block Diagram Chapter 3 Pin Descriptions 3.1Pin Descriptions Table 3.1 USB2512Ai Pin Descriptions (continued) SERIAL PORT INTERFACE MISC Page Table 3.2 SMBus or EEPROM Interface Behavior CFG_SEL1 CFG_SEL0 SMBUS OR EEPROM INTERFACE BEHAVIOR Table 3.3 Power, Ground, and No Connect 3.2Buffer Type Descriptions Chapter 4 Configuration Options 4.12-PortHub 4.1.1Hub Configuration Options 4.1.1.1Power Switching Polarity 4.1.2VBus Detect 4.2.1.1Register 00h: Vendor ID (LSB) 4.2.1.2Register 01h: Vendor ID (MSB) 4.2.1.3Register 02h: Product ID (LSB) 4.2.1.4Register 03h: Product ID (MSB) 4.2.1.5Register 04h: Device ID (LSB) 4.2.1.6Register 05h: Device ID (MSB) 4.2.1.7Register 06h: CONFIG_BYTE_1 4.2.1.8Register 07h: Configuration Data Byte 4.2.1.9Register 08h: Configuration Data Byte 4.2.1.10Register 09h: Non-RemovableDevice Register 0Ah: Port Disable For Self-PoweredOperation 4.2.1.12Register 0Bh: Port Disable For Bus-PoweredOperation 4.2.1.13Register 0Ch: Max Power For Self-PoweredOperation 4.2.1.14Register 0Dh: Max Power For Bus-PoweredOperation 4.2.1.15Register 0Eh: Hub Controller Max Current For Self-PoweredOperation 4.2.1.16Register 0Fh: Hub Controller Max Current For Bus-PoweredOperation 4.2.1.17Register 10h: Power-OnTime 4.2.1.18Register F6h: Boost_Up 4.2.1.19Register F8h: Boost_2:0 4.2.1.20Register FAh: Port Swap Register FBh: Port Remap 4.2.1.22Register FFh: Status/Command 4.2.2 I2C EEPROM 4.2.2.1Implementation Characteristics 4.2.2.2Pull-UpResistor 4.2.2.3I2C EEPROM Slave Address 4.2.3In-CircuitEEPROM Programming 4.3SMBus Slave Interface 4.3.1Bus Protocols 4.3.1.1Block Read/Write 4.3.2Invalid Protocol Response Behavior 4.3.3General Call Address Response 4.3.4Slave Device Time-Out 4.3.5Stretching the SCLK Signal 4.3.6SMBus Timing 4.4Default Configuration Option: 4.5Default Strapping Options: 4.6Reset 4.6.1Internal POR Hardware Reset 4.6.2External Hardware RESET_N 4.6.2.1RESET_N for Strapping Option Configuration 4.6.2.2RESET_N for EEPROM Configuration 4.6.2.3RESET_N for SMBus Slave Configuration 4.6.3USB Bus Reset Page Chapter 5 DC Parameters 5.1Maximum Guaranteed Ratings 5.2Operating Conditions Table 5.1 DC Electrical Characteristics (continued) ICLK Input Buffer O12, I/O12 &I/OSD12 Type Buffer IO-U CAPACITANCE TA = 25°C; fc = 1MHz; VDD18, VDDPLL Chapter 6 AC Specifications 6.1Oscillator/Clock 6.1.1SMBus Interface: 6.1.2I2C EEPROM: 6.1.3USB RevisionChapter 7 Package Outline