Industrial Temperature Rated USB 2.0 Hi-Speed 2-Port Hub Controller

Datasheet

Table 3.1 USB2512Ai Pin Descriptions (continued)

 

QFN-36

BUFFER

 

SYMBOL

EMB

TYPE

DESCRIPTION

 

 

 

 

RBIAS

35

I-R

USB Transceiver Bias

 

 

 

A 12.0kΩ (+/- 1%) resistor is attached from ground to this pin

 

 

 

to set the transceiver’s internal bias settings.

 

 

 

 

 

 

SERIAL PORT INTERFACE

 

 

 

 

SDA/

22

I/OSD12

Serial Data / SMB Data & Port Non-removable Strap Option

SMBDATA/

 

 

NON_REM1: Non-removable port strap option.

NON_REM1

 

 

 

 

 

If this strap is enabled by package and configuration settings

 

 

 

(see Table 3.2, "SMBus or EEPROM Interface Behavior"), this

 

 

 

pin will be sampled (in conjunction with LOCAL_PWR/

 

 

 

SUSP_IND/NON_REM0) at RESET_N negation to determine if

 

 

 

ports [2:1] contain permanently attached (non-removable)

 

 

 

devices:

 

 

 

NON_REM[1:0] = ‘00’, All ports are removable.

 

 

 

NON_REM[1:0] = ‘01’, Port 1 is non-removable.

 

 

 

NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable.

 

 

 

NON_REM[1:0] = ‘11’, Ports 1 & 2 are non-removable.

 

 

 

 

SCL/

24

I/OSD12

Serial Clock (SCL)

 

 

 

 

SMBCLK/

 

 

SMBus Clock (SMBCLK)

 

 

 

 

CFG_SEL0

 

 

Configuration Select_SEL0: The logic state of this multifunction

 

 

 

pin is internally latched on the rising edge of RESET_N

 

 

 

(RESET_N negation), and will determine the Hub configuration

 

 

 

method as described in Table 3.2, "SMBus or EEPROM

 

 

 

Interface Behavior".

 

 

 

 

HS_IND/

25

I/O12

Hi-Speed Upstream port indicator & Configuration

CFG_SEL1

 

 

Programming Select

 

 

 

HS_IND: Hi-Speed Indicator for upstream port connection

 

 

 

speed.

 

 

 

The active state of the LED will be determined as follows:

 

 

 

CFG_SEL1 = ‘0’,

 

 

 

HS_IND is active high,

 

 

 

CFG_SEL1 = ‘1’,

 

 

 

HS_IND is active low,

 

 

 

‘Asserted’ = Hub is connected at HS

 

 

 

‘Negated’ = Hub is connected at FS

 

 

 

 

 

 

 

CFG_SEL1: The logic state of this pin is internally latched on

 

 

 

the rising edge of RESET_N (RESET_N negation), and will

 

 

 

determine the Hub configuration method as described in

 

 

 

Table 3.2, "SMBus or EEPROM Interface Behavior".

 

 

 

 

 

 

 

MISC

 

 

 

 

XTAL1/

33

ICLKx

Crystal Input/External Clock Input

CLKIN

 

 

24MHz crystal or external clock input.

 

 

 

 

 

 

This pin connects to either one terminal of the crystal or to an

 

 

 

external 24MHz clock when a crystal is not used.

 

 

 

 

SMSC USB2512Ai

9

Revision 1.97 (08-11-08)

 

DATASHEET