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| Datasheet |
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| Table 4.2 Data Interface Signals | ||
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| NAME | DIRECTION | LEVEL | DESCRIPTION |
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| DATA[7:0] | Bidirectional | High | Data bus. | ||
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| (D7) |
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| TXVALID | DATA[7:0] | |
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| 0 | output | ||
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| (D0) |
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| 1 | input | |
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| TXVALID | Input | High | Transmit Valid. Indicates that the DATA bus is valid for transmit. The | ||
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| assertion of TXVALID initiates the transmission of SYNC on the USB | |
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| bus. The negation of TXVALID initiates EOP on the USB. | |
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| Control inputs (OPMODE[1:0], TERMSELECT,XCVRSELECT) must | |
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| not be changed on the | |
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| PHY must be in a quiescent state when these inputs are changed. | |
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| TXREADY | Output | High | Transmit Data Ready. If TXVALID is asserted, the SIE must always | ||
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| (TXR) |
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| have data available for clocking into the TX Holding Register on the | |
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| rising edge of CLKOUT. TXREADY is an acknowledgement to the | |
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| SIE that the transceiver has clocked the data from the bus and is | |
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| ready for the next transfer on the bus. If TXVALID is negated, | |
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| TXREADY can be ignored by the SIE. | |
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| RXVALID | Output | High | Receive Data Valid. Indicates that the DATA bus has received valid | ||
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| (RXV) |
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| data. The Receive Data Holding Register is full and ready to be | |
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| unloaded. The SIE is expected to latch the DATA bus on the rising | |
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| edge of CLKOUT. |
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| RXACTIVE | Output | High | Receive Active. Indicates that the receive state machine has | ||
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| (RXA) |
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| detected Start of Packet and is active. | |
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| RXERROR | Output | High | Receive Error. |
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| 0: Indicates no error. |
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| 1: Indicates a receive error has been detected. | |
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| This output is clocked with the same timing as the receive DATA lines | |
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| and can occur at anytime during a transfer. | |
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Table 4.3 USB I/O Signals
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| ACTIVE |
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| NAME |
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| DESCRIPTION |
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| DP |
| I/O |
| N/A |
| USB Positive Data Pin. |
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| DM |
| I/O |
| N/A |
| USB Negative Data Pin. |
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| Table 4.4 Biasing and Clock Oscillator Signals | ||||
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| ACTIVE |
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| NAME |
| DIRECTION |
| LEVEL |
| DESCRIPTION |
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| RBIAS |
| Input |
| N/A |
| External 1% bias resistor. Requires a 12kΩ resistor to ground. |
| (RB) |
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| Used for setting HS transmit current level and |
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| termination impedance. |
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| XI/XO |
| Input |
| N/A |
| External crystal. 24MHz crystal connected from XI to XO. |
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Revision 1.5 | 10 | SMSC USB3280 |
| DATASHEET |
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