Hi-Speed USB Device PHY with UTMI Interface

Datasheet

Chapter 2 Functional Block Diagram

RESET

SUSPENDN

XCVRSELECT

TERMSELECT

OPMODE[1:0]

LINESTATE[1:0]

CLKOUT

DATA[7:0]

TXVALID

TXREADY

RXVALID

RXACTIVE

RXERROR

3.VDD3

PWR

Control

Interface

UTMI

XI

 

XO

 

 

 

1.8V

PLL and

 

System

 

Regulator

XTAL OSC

 

Clocking

 

TX

 

 

TX

 

LOGIC

 

 

 

RPU_EN

 

 

 

 

 

 

 

TX State

VPO

 

1.5kΩ

 

 

 

 

Machine

 

 

 

 

 

 

 

Parallel to

VMO

 

FS

 

 

 

 

Serial

OEB

 

TX

 

Conversion

 

 

 

 

Bit Stuff

HS_DATA

 

 

HS_DRIVE_ENABLE

 

 

 

HS

 

NRZI

HS_CS_ENABLE

 

TX

 

Encode

 

 

 

 

 

 

 

 

DP

 

 

 

R

DM

 

 

 

X

 

RX

 

 

 

 

LOGIC

 

 

FS SE+

 

RX State

VP

 

 

 

VM

 

 

 

Machine

 

FS SE-

 

 

 

 

 

Serial to

Clock

 

 

 

Parallel

Recovery Unit

 

 

 

Conversion

 

 

 

 

 

 

 

Bit Unstuff

Clock

 

FS RX

 

and

 

 

 

 

 

Decode

Data

MUX

 

 

NRZI

Recovery

 

 

 

 

Elasticity

 

HS RX

 

 

Buffer

 

 

 

 

 

 

BIASING

HS SQ

Bandgap Voltage Reference

Current Reference

RBIAS

Figure 2.1 USB3280 Block Diagram

SMSC USB3280

7

Revision 1.5 (11-15-07)

 

DATASHEET