Datasheet
Chapter 4 Interface Signal Definition
Table 4.1 System Interface Signals
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NAME | DIRECTION | LEVEL |
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| DESCRIPTION |
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RESET | Input | High | Reset. Reset all state machines. After coming out of | ||
(RST) |
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| reset, must wait 5 rising edges of clock before asserting | ||
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| TXValid for transmit. | ||
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| See Section 7.8.3 | ||
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XCVRSELECT | Input | N/A | Transceiver Select. This signal selects between the FS | ||
(XSEL) |
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| and HS transceivers: | ||
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| 0: HS transceiver enabled | ||
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| 1: FS transceiver enabled. | ||
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TERMSELECT | Input | N/A | Termination Select. This signal selects between the FS | ||
(TSEL) |
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| and HS terminations: | ||
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| 0: HS termination enabled | ||
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| 1: FS termination enabled | ||
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SUSPENDN | Input | Low | Suspend. Places the transceiver in a mode that draws | ||
(SPDN) |
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| minimal power from supplies. Shuts down all blocks not | ||
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| necessary for Suspend/Resume operation. While | ||
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| suspended, TERMSELECT must always be in FS mode | ||
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| to ensure that the 1.5kΩ | ||
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| 0: Transceiver circuitry drawing suspend current | ||
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| 1: Transceiver circuitry drawing normal current | ||
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CLKOUT | Output | Rising Edge | System Clock. This output is used for clocking receive | ||
(CLK) |
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| and transmit parallel data at 60MHz. | ||
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OPMODE[1:0] | Input | N/A | Operational Mode. These signals select between the | ||
(OM1) |
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| various operational modes: | ||
(OM0) |
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| [1] | [0] | Description |
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| 0 | 0 | 0: Normal Operation |
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| 0 | 1 | 1: |
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| 1 | 0 | 2: Disable bit stuffing and NRZI encoding |
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| 1 | 1 | 3: Reserved |
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LINESTATE[1:0] | Output | N/A | Line State. These signals reflect the current state of the | ||
(LS1) |
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| USB data bus in FS mode, with [0] reflecting the state of | ||
(LS0) |
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| DP and [1] reflecting the state of DM. When the device is | ||
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| suspended or resuming from a suspended state, the | ||
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| signals are combinatorial. Otherwise, the signals are | ||
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| synchronized to CLKOUT. | ||
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| [1] | [0] | Description |
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| 0 | 0 | 0: SE0 |
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| 0 | 1 | 1: J State |
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| 1 | 0 | 2: K State |
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| 1 | 1 | 3: SE1 |
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SMSC USB3280 | 9 | Revision 1.5 |
| DATASHEET |
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