SOYO ETEQ82C663 PCI Setting Description, Bank 0/1 Dram, Timing, Bank 2/3 Dram, Bank 4/5 Dram

Models: ETEQ82C663 PCI ETEQ82C663 AGP SY-5EHM SY-5EH5

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BIOS Setup Utility

 

 

SY-5EHM/5EH5 V1.3

 

CHIPSET FEATURES SETUP

 

 

 

 

 

 

 

 

 

CHIPSET

 

Setting

Description

Note

 

FEATURES

 

 

 

 

 

 

 

 

 

 

 

Bank 0/1 DRAM

 

 

 

 

 

 

FP/EDO

Use the default setting

Default

 

Timing

 

70ns

 

 

 

Bank 2/3 DRAM

 

Normal

Choose DRAM Timing.

 

 

Timing

 

Medium

 

 

 

Bank 4/5 DRAM

 

Fast,

 

 

 

Timing

 

Turbo

 

 

 

DRAM Read

 

 

 

 

 

 

 

 

 

 

 

Disabled

 

 

 

Pipeline

 

Enabled

Enhances system

Default

 

Cache Rd+CPU

 

 

performance

 

 

 

 

 

 

 

 

Disabled

 

 

 

Wt Pipeline

 

Enabled

Enhances system

Default

 

Linear Burst

 

 

performance

 

 

 

 

 

 

 

 

Disabled

Use the default setting

Default

 

 

 

Enabled

Linear mode SRAM support

 

 

Video BIOS

 

 

for Cyrix type of CPU.

 

 

 

 

 

 

 

 

Disabled

 

 

 

Cacheable

 

Enabled

The ROM area A0000-

Default

 

System BIOS

 

 

BFFFF is cacheable.

 

 

 

 

 

 

 

 

Disabled

 

 

 

Cacheable

 

Enabled

The ROM area F0000H-

Default

 

Memory Hole

 

 

FFFFFH is cacheable

 

 

 

 

 

 

 

 

Disabled

Some interface cards will

Default

 

15Mb Addr.

 

 

map their ROM address to

 

 

 

 

 

this area.

 

 

 

 

Enabled

 

 

48

Page 53
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SOYO ETEQ82C663 PCI, SY-5EHM Setting Description, Bank 0/1 Dram, Timing, Bank 2/3 Dram, Bank 4/5 Dram, Dram Read, Pipeline