Theory of Operation Teledyne API – Model T300/T300M CO Analyzer

Teledyne Analytical Instruments 303
Thermo-Electric
Cooler
Control Circuit

Sample &

Hold

Circuits

(x4) Amplifiers
Dark
Switch
Photo-
detector
Pre Amp

Phase

Lock

Loop

E-Test
Generator

Compact

Programmable

Logic Device

M/R Sensor
Segment
Sensor
E Test Control
Dark Switch
Control X10 Clock
Phase Lock
E Test A Gate
Dark Test Gate
X1 Reference
Segment
Status LED
Phase Lock Warning
M/R
Status LED
Segment Clock
E Test B Gate
Measure Gate
Measure Dark Gate
Reference Gate
Reference Dark Gate

CO MEAS

CO Reference

56V
Bias
Variable
Gain Amp
From GFC
Wheel
From CPU
via Mother
Board
Signal
Conditioner
Signal
Conditioner
10
x10
TEC Control
PHT DRIVE

Figure 13-13: GFC7001T/GFC7001TM Sync/Demod Block Diagram

13.4.3.1. SIGNAL SYNCHRONIZATION AND DEMODULATION The signal emitted by the IR photo-detector goes through several stages of amplification before it can be accurately demodulated. The first is a pre-amplification stage that raises the signal to levels readable by the rest of the sync/demod board circuitry. The second is a variable amplification stage that is adjusted at the factory to compensate for performance variations of mirrors, detectors, and other components of the optical bench from instrument to instrument. The workhorses of the sync/demod board are the four sample-and-hold circuits that capture various voltage levels found in the amplified detector signal needed to determine the value of CO MEAS and CO REF. They are activated by logic signals under the control of a compact Programmable Logic Device (PLD), which in turn responds to the output of the Segment Sensor and M/R Sensor as shown in Figure 13-9.