SCPA033

9.1.2 PME# Context Registers

If the PME# enable bit (bit 8) of the power-management control/status register (PCI offset A4h) is asserted, then the assertion of PRST# will not clear the following PME# context bits. If the PME# enable bit is not asserted, then the PME# context bits are cleared with PRST#. The PME# context bits are:

Bridge control register (PCI offset 3Eh): bit 6

System control register (PCI offset 80h): bits 10, 9, 8

Power-management control/status register (PCI offset A4h): bits 15, 8

ExCA power control register (ExCA offset 802h): bits 7, 5†, 4-3, 1-0 (†82365SL mode only)

ExCA interrupt and general control register (ExCA offset 803h): bits 6-5

ExCA card status change register (ExCA offset 804h): bits 11-8, 3-0

ExCA card status-change-interrupt configuration register (ExCA offset 805h): bits 3-0

CardBus socket event register (CardBus offset 00h): bits 3-0

CardBus socket mask register (CardBus offset 04h): bits 3-0

CardBus socket present state register (CardBus offset 08h): bits 13-7, 5-1

CardBus socket control register (CardBus offset 10h): bits 6-4, 2-0

9.2PME#/RI_OUT# Behavior

PME# and RI_OUT# are very important for power management. The PME# signal is useful for PCI power management systems. The RI_OUT# (Ring Indicate Out) signal is used for legacy power management systems. PME# and RI_OUT# are multiplexed on the same pin. The PCI1520 can also provide RI_OUT# on the Multifunction terminals.

To enable passage of Ring signals from the PC Card interface, RINGEN (bit 7 ExCA offset 803) must be set to ‘1’, and RIENB (bit 7 PCI offset 91h) must be set to ‘1’. This is a per socket function.

9.3CLKRUN# Protocol

CLKRUN# is a hardware method of clock control that can be used in parallel with other types of power management. For the PCI1520, PCI CLKRUN# can be programmed using the Multifunction Routing Register (PCI offset 8Ch) on MFUNC6. CardBus CLKRUN# is a required signal incorporated into the PC Card interface. The following bits can be used to adjust the operation of how PCI and CB CLKRUN# affect the PCI1520:

Multifunction Routing register – MFUNC6 (PCI offset 8Ch, bits 27-24 set to 0001b). Requires a 43kpullup.

KEEPCLK – System Control Register (PCI offset 80h, bit 1). Setting this bit to a ‘1’ will never allow the PCI CLKRUN# protocol to stop or slow the PCI clock.

PCI1520 Implementation Guide

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Texas Instruments PCI1520 manual PME#/RIOUT# Behavior, CLKRUN# Protocol