Texas Instruments SLVU013 Figure 21. TPS56xx Functional Block Diagram

TPS56xx Functions

2-3

Design Procedure

Figure 2–1. TPS56xx Functional Block Diagram

INHIBIT

OCP

SLOWST

IOUT

BIAS

DRV

BOOT

HIGHDR

BOOTLO

LOWDR

DRVGND

HISENSEIOUTLOLOSENSEPWRGDANAGND

CC

V

VREFBAGND2 VSENSEVHYST LODRVLOHIB

_

+

2 V

10 V

UVLO

VCC

22

3

8

25 4 6 11 10

15 7 28 20 21 19

1

9

14

16

17

18

13

12

_+Deglitch

100mV

VOVP

1.15 VREF VSENSE

S

R

Q

VCC

Deglitch

Fault

Shutdown

VPGD

0.93 VREF

Rising

Edge

Delay

HIGHIN

HIGHDR

2X

Shutdown

_

+

Bandgap

_

+

IVREFB

5

Analog

Bias

VREF

Hysteresis

Setting

IVREFB

_

+

_

+

Hysteresis

Comparator

Shutdown

Slowstart

Comparator

CM Filters

PREREG

DRV REG

VCC Analog

Bias

This section describes the functions governed by the TPS556xx. A procedure

is given to determine the values of components used in the example design

given in Figure 1–3. Example calculations for the 3.3-V output version accom-

pany the design equations. There are many possible ways to proceed when

designing power supplies and some iteration may be necessary when actual

performance differs from design predictions. Reference designators refer to

the circuit in Figure 1–3.

2.1.1 VCC Undervoltage Lockout

The VCC undervoltage lockout circuit disables the controller while VCC is below

the 10-V start threshold during power up. While the controller is disabled, the

output drivers will be low and the slowstart capacitor will be shorted. When VCC

exceeds the start threshold, the short across the slowstart capacitor is

released and normal converter operation begins. There is a 2-V hysteresis in

the undervoltage lockout circuit for noise immunity.

Contents

Main Page Preface Read This First About This Manual How to Use This Manual Information About Cautions and Warnings Related Documentation From Texas Instruments Synchronous Buck Converter Design Using TPS56xx Controllers in SLVP10x EVMs Users Guide The TPS56xx Family of Power Supply Controllers FCC Warning Trademarks Contents Figures Tables Page Chapter 1 Introduction Topic Page 1.1 Synchronous Buck Regulator Operation Figure 11. Simplified Synchronous Buck Converter Schematic 1.2 Hysteretic Control Operation Figure 12. Simplified Hysteretic Controlled Output Voltage Waveform 1.3 Design Strategy Providing a DSP Power Solution from 5 V or 3.3 V Only Systems Table 11.Summary of EVM Converter Modules 1.4 Design Specification Summary Table 12.EVM Converter Operating Specifications Design Specification Summary Table 12.EVM Converter Operating Specifications (Continued) Schematic Introduction 1-7 1.5 Schematic Figure 13. SLVP111114 EVM Converter Schematic Diagram Bill of Materials 1.6 Bill of Materials Table 13 lists materials required for the SLVP111114 EVMs. Table 13.SLVP111114 EVMs Bill of Materials Bill of Materials Introduction Table 13.SLVP111114 EVMs Bill of Materials (Continued) 1.7 Board Layout Page Page Chapter 2 Design Procedure hysteretic Topic Page 2.1 TPS56xx Functions TPS56xx Functions Design Procedure 2-3 Figure 21. TPS56xx Functional Block Diagram 2.1.1 VCC Undervoltage Lockout 2.1.2 Inhibit 2.1.3 Slowstart Design 2.1.4 Hysteresis Setting Page 2.1.5 Noise Suppression Figure 22. Block Diagram Showing Noise Suppression Circuits 2.1.6 Overcurrent Protection Figure 23. V DS Sensing Circuit Page 2.1.7 Overvoltage Protection 2.1.8 Power Good 2.1.9 Bias 2.1.10 Gate Drivers TPS56xx Functions Figure 24. Gate Driver Block Diagram Figure 25. IV Characteristic Curve for Low-Side Gate Drivers 2.1.10.1 Low-Side Driver Controls 2.1.10.2 High-Side Driver 2.1.10.3 Grounding Layout Guidelines . 2.2.3.1 Output Capacitance ESR mV m 2.2.3.2 Output Inductance 2.2.4 Switching Frequency Analysis External Component Selection 2-18 Figure 26. Output Ripple Voltage Detail L Io DS(on) ) Page 2.2.5 Power MOSFET Selection Test Results 3.1 Test Summary 3.1.1 Static Line and Load Regulation 3.1.2 Output Voltage Ripple 3.1.3 Efficiency and Power Losses 3.1.4 Output Start-Up and Overshoot 3.1.5 Frequency Variation Designing Fast Response Synchronous Buck Converters Using the TPS5210 controller A Fast, Efficient Synchronous-Buck Controller for Microprocessor Power Supplies 3.1.6 Load Current Transient Response 3.1.8 Conclusion 3.2 Test Setup R Watts R + 3-7 3.3 Test Results Figures 32 to 3102 show test results for the SLVP111. Figure 32. SLVP111 Measured Load Regulation SLVP111 MEASURED LOAD REGULATION Figure 33. SLVP111Measured Efficiency Figure 34. SLVP111Measured Power Dissipation SLVP111 MEASURED POWER DISSIPATION Figure 35. SLVP111Measured Switching Frequency SLVP111 MEASURED SWITCHING FREQUENCY 3-9 Figure 36. SLVP111 Measured Switching Waveforms Figure 37. SLVP111Measured Start-Up (INHIBIT) Waveforms 3-10 Figure 38. SLVP111 Measured Start-Up (V Figure 39. SLVP111Measured Start-Up (V 3-11 Figure 310. SLVP111 Measured Load Transient Waveforms Figure 311. SLVP112 Measured Load Regulation SLVP112 MEASURED LOAD REGULATION 3-12 Figure 312. SLVP112 Measured Efficiency SLVP111 MEASURED EFFICIENCY Figure 313. SLVP112 Measured Power Dissipation SLVP111 MEASURED POWER DISSIPATION 3-13 Figure 314. SLVP112 Measured Switching Frequency SLVP112 MEASURED SWITCHING FREQUENCY Figure 315. SLVP112 Measured Switching Waveforms 3-14 Figure 316. SLVP112 Measured Start-Up (INHIBIT) Waveforms Figure 317. SLVP112 Measured Start-Up (V 3-15 Figure 318. SLVP112 Measured Start-Up (V Figure 319. SLVP112 Measured Load Transient Waveforms 3-16 Figure 320. SLVP113 Measured Load Regulation SLVP113 MEASURED LOAD REGULATION Figure 321. SLVP113 Measured Efficiency SLVP113 MEASURED EFFICIENCY 3-17 Figure 322. SLVP113 Measured Power Dissipation SLVP113 MEASURED POWER DISSIPATION Figure 323. SLVP113 Measured Switching Frequency SLVP113 MEASURED SWITCHING FREQUENCY 3-18 Figure 324. SLVP113 Measured Switching Waveforms Figure 325. SLVP113 Measured Start-Up (INHIBIT) Waveforms 3-19 Figure 326. SLVP113 Measured Start-Up (V Figure 327. SLVP113 Measured Start-Up (V 3-20 Figure 328. SLVP113 Measured Load Transient Waveforms Figure 329. SLVP114 Measured Load Regulation SLVP114 MEASURED LOAD REGULATION 3-21 Figure 330. SLVP114 Measured Efficiency SLVP114 MEASURED EFFICIENCY Figure 331. SLVP114 Measured Power Dissipation SLVP114 MEASURED POWER DISSIPATION 3-22 Figure 332. SLVP114 Measured Switching Frequency SLVP114 MEASURED SWITCHING FREQUENCY Figure 333. SLVP114 Measured Switching Waveforms 3-23 Figure 334. SLVP114 Measured Start-Up (INHIBIT) Waveforms Figure 335. SLVP114 Measured Start-Up (V 3-24 Figure 336. SLVP114 Measured Start-Up (V Figure 337. SLVP114 Measured Load Transient Waveforms