TPS56xx Functions
2-11
Design Procedure
Figure 2–4. Gate Driver Block DiagramLevel
Shifter/
Predriver
M1
45 Ω
M2
5 Ω
BOOT
HIGHDR
C4
BOOTLO
Highside Driver
Predriver
M3
45 Ω
M4
5 Ω
LOWDR
DRVGND
Lowside Driver
L2
Vphase
C2
VO
Vin
C1
L1
C3
DRV
8 V Drive
Regulator
Adaptive
Deadtime
Control
LOWDR
VREF
VCC
12 V
R2
R1
C5
TPS56xx Synchronous-Buck Controller