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Texas Instruments TA5704EVM TAS5704 I/O, Master Reset, Engineering Evaluation Only, TAS5704PAP

Models: TA5704EVM

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TAS5704 I/O

TAS5704 I/O

ENGINEERING EVALUATION ONLY

MASTER RESET

3.3V DECOUPLING

TO SPDIF

MUTE

PGND

SE

BTL

BLT=SHUNTS IN

SE=SHUNTS OUT

POWER

PGND

DOWN

FROM

MUTE

SPDIF

SE

BLT=SHUNTS IN

SE=SHUNTS OUT

FROM

U1

PGND

ADC

TAS5704PAP

SE

BTL

BLT=SHUNTS IN

SE=SHUNTS OUT

PGND

GAIN CONTROL

GAIN1

GAIN0 CHANNEL GAIN (dB)

0

0

20 DEFAULT

0

1

26

SE

1

0

32

1

1

36

BLT=SHUNTS IN

PGND

SE=SHUNTS OUT

FORMAT CONTROL

PGND

DEFAULT JUMPERED TO 4xSE MODE

FM2

FM1

FM0

SERIAL DATA FORMAT

0

0

0

16Bit RJ

0

0

1

18Bit RJ

0

1

0

20Bit RJ

0

1

1

24Bit RJ

1

0

0

16-24Bit I2S(DEFAULT)

1

0

1

16-24Bit LJ

1

1

0

RESERVED

1

1

1

TEST MODE

CONFIG CONTROL

CFG2

CFG1

OUTPUT MODE

TO SUBWOOFER CONNECTOR

0

0

2CH/BTL/AD

FROM

0

1

2CH/BTL/BD

1

0

2.1CH/2xSE/1xBTL

SPDIF

1

1

4CH/4xSE(DEFAULT)

PGND

VALID

SHUTDOWN

FROM SUBWOOFER DAUGHTERCARD

CX PROJECT: TAS5704 EVALUTION MODULE

Design Team:

RYAN KEHR

Schematic Rev:

NC

Mod: NC

PCB Rev: NC Sheet 3 of 6

Save Date: JULY 10, 2007

Print Date Tue Jul 10, 2007

TIFilename: TAS5704EVM.SCH

Drawn By: LDN

Image 22

Texas Instruments TA5704EVM manual TAS5704 I/O, Master Reset, Engineering Evaluation Only, TAS5704PAP

Contents

Users Guide Literature Number SLOU224 AprilSLOU224-April2008 Submit Documentation FeedbackContents List of Figures List of TablesHow to Use this Manual Read This FirstPreface About This ManualAdditional Documentation Additional DocumentationEVM Warnings / Restrictions and FCC Warning Read This FirstUsers Guide 1Overview1.1TAS5704EVM Features Figure 3. 4-ChannelSE Configuration2.1PSU Interface 1.2Basic Tools for Initial Board Power up2System Interfaces Figure 4. Top Composite View of TAS5704EVMTable 1. Recommended Power Supplies 2.2PSC Connector2.4Digital Audio Interface SPDIF J1/OPTO 3 Jumpers and Control Utilities 2.6Board Power up General Guidelines2.5ADC Interface 3.1Clock Frequency Change Jumper3.4GAIN Jumpers 3.6CONFIG JumpersTable 3. TAS5704 Gain Configuration 3.5Data Format Jumpers3.7Switches Table 6. TAS5704 Output Configuration4.1TAS5704EVM Board Layout, Top Composite View 4 Board Layout, Bill of Material, and SchematicsBoard Layout, Bill of Material, and Schematics Figure 5. Top Layer CompositeFigure 6. Top Layer Board Layout, Bill of Material, and Schematics4.2TAS5704EVM Board Layout, Top Layer View Submit Documentation FeedbackFigure 7. Bottom Layer Board Layout, Bill of Material, and Schematics4.3TAS5704EVM Board Layout, Bottom Layer View Submit Documentation FeedbackTable 7. Bill of Materials for TAS5704EVM Board Layout, Bill of Material, and Schematics4.4Bill of Materials Submit Documentation FeedbackSLOU224-April2008 Board Layout, Bill of Material, and SchematicsSubmit Documentation Feedback Board Layout, Bill of Material, and Schematics 4.5SchematicThe schematics are appended to this document Submit Documentation FeedbackSPDIF FORMAT SPDIF RECEIVERENGINEERING EVALUATION ONLY CX PROJECT TAS5704 EVALUTION MODULESchematic Rev ANALOG TO DIGITAL CONVERTER1-2 SDIN2 = ADC DEFAULT ENGINEERING EVALUATION ONLYENGINEERING EVALUATION ONLY MASTER RESETTAS5704 I/O TAS5704PAPBOM ONLY POWER SUPPLIESSUBWOOFER CONNECTOR POWER INPUTSDESCRIPTION REVISION CHANGESREVISION DATEDISCLAIMER TEXAS INSTRUMENTS DISCLAIMERENGINEERING EVALUATION ONLY FCC Warning EVALUATION BOARD/KIT IMPORTANT NOTICEEVM WARNINGS AND RESTRICTIONS Products IMPORTANT NOTICEApplications