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Texas Instruments TAS5121 manual Digital Audio Interface J40, 12.J40 Pin Description, Net-Nameat

Models: TAS5121 TAS5508-5121K8EVM

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Digital Audio Interface (J40)

2.8 Digital Audio Interface (J40)

The digital audio interface contains digital audio signal data (I2S), clocks, etc. See the TAS5508B Data Manual (SLES162) for signal timing and details not explained in this document.

Table 2−12.J40 Pin Description

Pin	Net-Name at
No.	Schematics	Description

1	GND	Ground

2	MCLK	Master clock input. Low-jitter system clock for PWM generation and reclocking.
		Ground connection from source to the TAS5508B must be a low-impedance
		connection.

3	GND	Ground

4	SDIN1	I2S data 1, channel 1 and 2
5	SDIN2	I2S data 2, channel 3 and 4
6	SDIN3	I2S data 3, channel 5 and 6
7	SDIN4	I2S data 4, channel 7 and 8
8		Reserved

9		Reserved

10	GND	Ground

11	SCLK	I2S bit clock
12	GND	Ground

13	LRCLK	I2S left−right clock
14	GND	Ground

15		Reserved

16	GND	Ground

System Interfaces

2-7

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Texas Instruments TAS5121 Digital Audio Interface J40, 12.J40 Pin Description, Net-Nameat, Schematics, System Interfaces

Contents

TAS5508−5121K8EVM User’s GuideProducts IMPORTANT NOTICEApplications FCC WARNING EVALUATION BOARD/KIT IMPORTANT NOTICEEVM WARNINGS AND RESTRICTIONS Information About Cautions and Warnings How to Use This ManualRead This First About This ManualTrademarks Related Documentation From Texas InstrumentsAdditional Documentation FCC WarningContents ContentsTables FiguresTopic OverviewChapter Page1.1TAS5508−5121K8EVM Features PCB Key Map 1.2 PCB Key MapOverview Page Line Out Connectors J950 and J951 System InterfacesPower Supply PSU Interface J70, J71, and J73 Loudspeaker Connectors J100Figure 2−2. J71 and J70 Pin Numbers 2.1 Power Supply PSU Interface J70, J71, and J73Figure 2−1. Recommended Power-UpSequence Table 2−1. Recommended Supply VoltagesTable 2−4. J73 Pin Description Table 2−2. J71 Pin DescriptionTable 2−3. J70 Pin Description Figure 2−3. J73 Pin NumbersFigure 2−5. J100 . . . J800 Pin Numbers 2.2 Loudspeaker Connectors J100 . . . J8002.3 Line Out Connectors J950 and J951 Table 2−5. J72 Pin DescriptionFigure 2−7. J900 Pin Numbers 2.4 Headphone Connector J9002.5 Line Output Select J50 2.6 Headphone Select J32Control Interface J30 2.7 Control Interface J30Table 2−11. J30 Pin Description SchematicsDigital Audio Interface J40 2.8 Digital Audio Interface J40Table 2−12.J40 Pin Description SchematicsPage Page ProtectionDevice Fault Reporting ChapterPage Table 3−2. TAS5121 Warning/Error Signal Decoding 3.2 Device Fault ReportingTable 3−1. Channel Allocation