TC9457F
2002-10-21
12
I/O Ports (P1-0 to P4-3) Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
High level IOH3 ― V
OH = 4.5 V −1 −2 ―
IOL3 ― VOL = 0.5 V
(exclude P4-1, 2, 3 pin) 1.5 3.0 ―
Output current
Low level
IOL5 ― V
OL = 0.5 V (P4-1, 2, 3 pin) 4 10 ―
mA
Input leakage current ILI ― V
IH = 5.0 V, VIL = 0 V ― ― ±1.0 µA
High level VIH ― ― MVDD
× 0.8 ~ MVDD
Input voltage
Low level VIL ― ― 0 ~
MVDD
× 0.2
V
Input pullup/down resistance RIN1 ― (P1-0 to P1-3) When pulldown,
pullup are set. 25 50 120 kΩ
HOLD, INTR Input Port, RESET Input
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
Input leakage current ILI ― V
IH = 5.0 V, VIL = 0 V ― ― ±1.0 µA
High level VIH3 ― ― MVDD
× 0.8 ~ MVDD
Input voltage
Low level VIL 3 ― ― 0 ~
MVDD
× 0.2
V
A/D Converter (ADIN1 to ADIN4)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
Analog input voltage range VAD ― ADIN to ADIN4 0 ~ MVDD V
Resolution VRES ― ― ― 6 ― bit
Overall conversion error ― ― ― ― ±0.5 ±4.0 LSB
Analog input leakage ILI ― VIH = 5.0 V, VIL = 0 V
(ADIN1 to ADIN4) ― ― ±1.0 µA
DATA, SFSY, LRCK, BCK, AOUT, MBOV, IPF Outputs and CLCK Input/Output
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
High level IOH4 ―
VOH = 4.5 V
(Settings OT for output,
LEDon = 0)
−2.0 −4.0 ―
Output current
Low level IOL5 ―
VOL = 0.5 V
(Settings OT for output,
LEDon = 0)
5 10 ―
mA
Input leakage current ILI ― VIH = 5.0 V, VIL = 0 V
(CLCK) ― ― ±1.0 µA
High level VIH ― (CLCK) MVDD
× 0.8 ~ MVDD
Input voltage
Low level VIL ― (CLCK) 0 ~ MVDD
× 0.2
V