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| SDHC Memory Card + Reader P2 | ||||
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| Single card capacitance | CCARD |
| 10 |
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| Maximum signal line inductance |
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| nH | fPP ≤ 20 MHz | |
| RDAT3 | 10 | 90 |
| kΩ | May be used for card | ||
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Note that the total capacitance of CMD and DAT lines will be consist of CHOST, CBUS and one CCARD only because they are connected separately to the SD Memory Card host.
Host should consider total bus capacitance for each signal as the sum of CHOST, CBUS, and CCARD, these parameters are defined by per signal. The host can determine CHOST and CBUS so that total bus capacitance is less than the card estimated capacitance load (CL=40 pF). The SD Memory Card guarantees its bus timing when total bus capacitance is less than
maximum value of CL (40 pF).
Transcend Information Inc.
4
