Xilinx Frequency Generator manual PicoBlaze Circuit Diagram, On the LCD

PicoBlaze Circuit Diagram

PicoBlaze provides the user interface and performs

the calculations required to generate the 32-bit DDS

‘JTAG_loader’ allows rapid

control word ‘N’ and 5-bit DDS scaling word ‘D’.

PicoBlaze code development.

Hint – The ‘fg_ctrl.psm’ file contains significant

program_rom

comments to explain the operations and calculations

fg_ctrl

that the PicoBlaze program is performing to

proc_reset

JTAG

generate ‘N’ and ‘D’ from the BCD value displayed

instruction

on the LCD.

lcd(7)

reset

clk

address

lcd(6)

kcpsm3_

instruction

lcd(5)

address

lcd(4)

processor

kcpsm3

rotary_press

rotary_press_in

input_ports

instruction

address

out_port

in_port

in_port

out_port

write_strobe

50MHz clock to all items on this page

0

read_strobe

read_strobe

port_id

clk

reset

port_id

interrupt

interrupt

interrupt_ack

clk

clk

rotary_filter & direction

interrupt_control

See reference

rotary_a

design called

rotary_left

‘Rotary Encoder

rotary_b

Interface for

rotary_event

interrupt_ack

Spartan-3E Starter

Kit’ for details of

this section.

Vcc

* StrataFLASH memory

strataflash_oe

*

must be disabled to

prevent interference with

strataflash_ce

*

the LCD display.

strataflash_we

*

Frequency Generator for the Spartan-3E Starter Kit 8

output_ports

7

write_strobe

6

5

4

3

2

1

led(7)

led(6)

led(5)

led(4)

led(3)

led(2)

led(1)

led(0)

bidirectional

LCD data

lcd(7)

lcd(6)

lcd(5) lcd(4)

lcd_rs lcd_rw

lcd_e

[4:0] dds_scaling_word

	D
[31:24]
[23:16]
	dds_control_word
[15:8]	N
[7:0]