Design Files
The source files provided for the reference design are…..
Top level file and main description of hardware.
frequency_generator.vhd Contains I/O required to disable StrataFLASH memory device on the board which may otherwise interfere with the LCD display.
frequency_generator.ucf | I/O constraints file for | |||
Timing specifications for 50MHz PicoBlaze controller 200MHz DDS circuits. | ||||
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| Location constraint for DCM used for Jitter reduction. | ||
kcpsm3.vhd | PicoBlaze processor for | |||
fg_ctrl.vhd | Assembled program for PicoBlaze (stored in a Block memory) | |||
| fg_ctrl.psm | PicoBlaze program source assembler code | ||
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| This design contains an otherwise undocumented and unspecified mode of | |
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| operation for a DCM. Before this design can be processed a special BITGEN option | |
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| needs to be set. Please read the notes provided on page 13 as well as those | |
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| contained in ‘frequency_generator.vhd©for details of this special requirement. | |
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Note: The file shown in green is not included with the reference design as it is provided with PicoBlaze download. Please visit the PicoBlaze Web site for your free copy of PicoBlaze, assembler, JTAG_loader and documentation.
www.xilinx.com/picoblaze
Hint – The JTAG_Loader utility supplied with PicoBlaze has been included in this design. This enables the new programs to be written for PicoBlaze using the configuration file provided.
Hint – You do not need PicoBlaze if you use this design as the basis for implementing a fixed frequency module. However, I’m sure you will want PicoBlaze for other parts of your design now that you have seen what it is capable of doing .
Frequency Generator for the
