Intel 80386 manual Principal Descriptor Fields

SYSTEM ARCHITECTURE

address space to be a single entity shared by all tasks and the operating system itself; in other words, a single segment is shared system-wide. At the other extreme, a system might map every data structure and procedure into a different segment, making a task's logical address space consist of dozens or hundreds of address spaces, each corresponding to a procedure or a data structure. Between these extremes might fall a general-purpose timesharing system in which tasks run in separate logical address spaces, and in which a task's code is separated from its data, and application code and data are separated from operating system code and data. The 80386 segmentation facility is versatile enough to sup- port each ofthese examples, and others as well.

As described in Chapter 2, an instruction refers to a memory operand by a two-part logical address consisting of a segment selector and an offset into the segment. In principle, the 80386 translates the logical address to a linear address by using the selector to look up the segment's descriptor in a segment descriptor table. The descriptor contains the segment's base address in the linear address space; adding the offset pro- duces the operand's linear address. In practice, the logical-to-linear address translation is opti- mized by implicit selectors and register-based descriptors. As a result, the descriptor table lookup only occurs for instructions that load

ATTRIBUTES

new selectors into segment registers (for exam- ple, a Call to a procedure in a different seg- ment changes the selector in the CS register).

Although it rarely occurs in practice, it is nevertheless convenient to think of the processor translating logical addresses by looking up descrip- tors in segment descriptor tables because it follows that the descriptors in a task's segment descriptor tables define the task's logical address space. Without a descriptor a task has no way to generate a linear address.

A segment descriptor table is an array of descriptors; Figure 3-4shows the logical format of a descriptor. The base address field has already been explained. The limit field specifies the length ofthe segment; the 80386 uses the limit field to verify that the offset part of a logical address is valid-that it actually falls within the segment. The segment attributes mainly relate to protection and are described later in the chapter.

Each task can have a system-wide and a private logical address space; these are represented by the Global Descriptor Table (GOT) and the Local Descriptor Table (LOT), respectively. (A selector contains a bit associating it with 'one table or the other.)These descriptor tables can contain up to 8,192 descriptors each, and together they define a task's logical address space. That is, to make a new segment addressable by a task, the

ACCESSED			I
RIGHTS
			I I
TYPE	~	1
PRIVILEGE
PRESENT
	I I	I	I I
	LIMIT
	BASE ADDRESS

Figure 3-4. Principal Descriptor Fields

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