Intel DBPXA250, DBPXA210 specifications July

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Intel® DBPXA250 and DBPXA210 Development Platform for Intel® Personal Internet Client Architecture

Specification Update

July 2002

Notice: The Intel® DBPXA250 and DBPXA210 Development Platform for Intel® Personal Internet Client Architecture may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update.

Order Number: 278555-002

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Contents July Page Page Page Date Version Description Revision HistoryAffected Documents/Related Documents PrefaceNomenclature Intel DCPXA250 Processor Card Markings General InformationCodes Used in Summary Table Summary of ChangesECO no Summary of DCPXA210 Processor Card ECOs Sheet 2 UCB1400 Generates Interrupts Incorrectly Intel BBPXA2xx Development BaseboardLCD Touch Screen Intermittently Fails MHz Sdram FailureLCD Picture Conditional ECO To Use The Expansion Port J26 Conditional ECO To Use 3.3-V Pcmcia CardsConditional ECO For USB Soft Connect Support Vccpll And Vcccore Pin Voltage Must Be Equal Intel DCPXA250 Processor CardMHz Sdram Requires 0-ohm Resistors For ARM* Multi-ICE* Jtag Use Wire From The J3-3 To The Via Of U1 PinVoltage Divider Excessive Oscillator Output Voltage to Pextal PinSignal Integrity Problems On Sdclk Coin Cell Battery IssueVCC Core Voltage Change For Multi-ICE Jtag Use Intel DCPXA210 Processor CardMMC Mmclk Support PLL Voltage Too HighIncorrect Boot Mode Selected For PXA210 Processor Remove Coin Cell BatteryIntel DCPXA210 Processor Card