Intel DBPXA250, DBPXA210 specifications Revision History, Date Version Description

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Revision History

Date of

Version

Description

Revision

 

 

 

 

 

May 2002

-001

Public Release

 

 

 

 

 

Removed 1, 2, 3, 4, 5, 6, 7, 8, 9, from Intel® BBPXA2xx Development

 

 

Baseboard.

 

 

Removed 1, 2, 4, 5, 6, 11, 12 from Intel® DCPXA250 processor card.

July 2002

-002

Modified 12, 14 on the BBPXA2xx Development Baseboard.

 

 

Modified 7, 9, 10, and 13 on the DCPXA250 processor card.

 

 

Modified 1 on the DCPXA210 processor card.

 

 

Added steppings matrix

 

 

 

DBPXA250 and DBPXA210 Development Platforms Specification Update

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Contents July Page Page Page Date Version Description Revision HistoryAffected Documents/Related Documents PrefaceNomenclature Intel DCPXA250 Processor Card Markings General InformationCodes Used in Summary Table Summary of ChangesECO no Summary of DCPXA210 Processor Card ECOs Sheet 2 UCB1400 Generates Interrupts Incorrectly Intel BBPXA2xx Development BaseboardLCD Touch Screen Intermittently Fails MHz Sdram FailureLCD Picture Conditional ECO For USB Soft Connect Support Conditional ECO To Use 3.3-V Pcmcia CardsConditional ECO To Use The Expansion Port J26 MHz Sdram Requires 0-ohm Resistors Intel DCPXA250 Processor CardVccpll And Vcccore Pin Voltage Must Be Equal For ARM* Multi-ICE* Jtag Use Wire From The J3-3 To The Via Of U1 PinVoltage Divider Excessive Oscillator Output Voltage to Pextal PinSignal Integrity Problems On Sdclk Coin Cell Battery IssueVCC Core Voltage Change For Multi-ICE Jtag Use Intel DCPXA210 Processor CardMMC Mmclk Support PLL Voltage Too HighIncorrect Boot Mode Selected For PXA210 Processor Remove Coin Cell BatteryIntel DCPXA210 Processor Card