Intel DBPXA250, DBPXA210 specifications Coin Cell Battery Issue, Signal Integrity Problems On Sdclk

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Intel® DCPXA250 Processor Card

9.Coin Cell Battery Issue

Problem: Specification change to BATT_VCC. Stop using the backup battery and connect BATT_VCC to VCCQ.

Implication: VCCQ might attempt to charge battery if BATT_VCC is lower than VCCQ

Workaround: For Rev C boards:

1.Remove CR2032 coin cell battery from battery holder B1.

2.Remove the 0-ohm resistor R23B.

3.Install, on the bottom of the board, a 30-AWG wire between TP11 (red) and J8 pin 1 (VCCQ).

For Rev D boards:

1.Remove CR2032 coin cell battery from battery holder B1.

2.Remove the 0-ohm resistor R23B.

3.Install, on the bottom of the board, a 30-AWG wire between TP11 (red) and TP30 (red).

Status:

Fixed

Board Rev:

Rev C and D

10.

Signal Integrity Problems On SDCLK

Problem:

Signal integrity problems on SDCLK.

Implication:

Unstable operation with 100-MHz SDCLK.

Workaround:

For 100-MHz SDRAM development, Intel recommends using Rev F of the DCPXA250 processor

 

card in place of this procedure. Contact your local Intel representative for availability.

Use the following procedure to improve the SDCLK signal integrity.

1.Cut the trace exiting U10B, pin 38 on the bottom of the DCPXA250 processor card.

2.Update CPLD U4 with latest code. Refer to http://developer.intel.com for latest CPLD updates. This adjusts the voltage (VCC) from +1.2 V to +1.4 V.

Status:

Plan Fix

Board Rev:

Rev C and D

Figure 11. U10B Trace Cut Pin 38

DBPXA250 and DBPXA210 Development Platforms Specification Update

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Contents July Page Page Page Date Version Description Revision HistoryAffected Documents/Related Documents PrefaceNomenclature Intel DCPXA250 Processor Card Markings General InformationCodes Used in Summary Table Summary of ChangesECO no Summary of DCPXA210 Processor Card ECOs Sheet 2 UCB1400 Generates Interrupts Incorrectly Intel BBPXA2xx Development BaseboardLCD Touch Screen Intermittently Fails MHz Sdram FailureLCD Picture Conditional ECO To Use The Expansion Port J26 Conditional ECO To Use 3.3-V Pcmcia CardsConditional ECO For USB Soft Connect Support Vccpll And Vcccore Pin Voltage Must Be Equal Intel DCPXA250 Processor CardMHz Sdram Requires 0-ohm Resistors For ARM* Multi-ICE* Jtag Use Wire From The J3-3 To The Via Of U1 PinVoltage Divider Excessive Oscillator Output Voltage to Pextal PinSignal Integrity Problems On Sdclk Coin Cell Battery IssueVCC Core Voltage Change PLL Voltage Too High Intel DCPXA210 Processor CardFor Multi-ICE Jtag Use MMC Mmclk SupportIncorrect Boot Mode Selected For PXA210 Processor Remove Coin Cell BatteryIntel DCPXA210 Processor Card
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