Intel MIC-3321, 3U Compact PCI user manual Integrated Peripherals

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Memory Hole At 15M-16M

You can reserve this area of system memory for ISA adapter ROM. When this area is reserved, it cannot be cached. The user information of periph- erals that need to use this area of system memory usually discusses their memory requirements. The settings are: Enabled and Disabled (Default).

PCI-E Compliancy Mode

This allows the user to select the PCI-E compliant mode. The options are [v1.0], and [v1.0a].

On-Chip Video Memory Size

This field let you select On-Chip buffer size. The settings are: 1 and 8.

DVMT Mode

We have three options (Fixed, DVMT and Both). The default is DVMT.

DVMT/FIXED memory Size

We have 64Mb and 128MB. The default is 128MB.

4.2.4 Integrated Peripherals

Figure 4.5: Integrated Peripherals Setup

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Contents MIC-3321 Copyright Notice AcknowledgementsProduct Warranty CE NotificationPacking List Safety Precaution Static ElectricityTechnical Support and Assistance Contents CompactFlash Interface Hardware Configuration Ordering Information IntroductionCompact Mechanical Design Specifications Battery-backup RAM 512 KBStandard SBC Functions System MemoryFunction Block Diagram Mechanical and Environmental SpecificationsStorage Temperature -40 ~ 80 C Board Weight 0.6 kg DisplayBoard Dimensions Dip Switch SettingsSwitch Locations MIC-3321 Switch DescriptionsSafety Precautions MIC-3321 S2 Location 2FPage Connecting Peripherals Connectors MIC-3321 Connector Locations 1FMIC-3521 Connectors MIC-3321 Connectors Overview Card Installation To install a cardChassis Installation/Removal To remove a cardSoftware Configuration Intel Chipset Software Installation Utility OverviewUtilities and Drivers Intel VGA Graphics DriverAward Bios Setup Entering Setup Setup Program Initial ScreenStandard Cmos Setup IDE Device SetupDate TimeMemory Advanced Bios Features SetupHalt On Virus Warning Hard Disk Boot PriorityCPU Thermal Monitor Quick Power On Self Test First/Second/Third Boot Device and Boot Other DeviceBoot Up NumLock Status CPU L1 & L2 CacheTypematic Rate Setting Typematic Delay MsecSetupdefault Typematic Rate Chars/SecCAS Latency Time Advanced Chipset Features SetupDram Timing Configuration Dram RAS# to CAS# Delay Precharge delay tRASSystem Bios Cache-able Video Bios CacheableIntegrated Peripherals IDE HDD Block Mode On-Chip Primary Sata / Secondary Pata PCI IDEIDE Primary/Secondary Master/Slave PIO IDE Primary/Secondary Master/Slave UdmaUSB Controller USB 2.0 ControllerUSB Keyboard Support USB Mouse SupportInit Display Fiest 5 PNP/PCI Configuration SetupReset Configuration Data PC Health Status Resource Controlled ByIRQ Resources PCI/VGA Palette SnoopPC Health Status setup screen CPU Warning TemperatureSpread Spectrum Load Optimized DefaultsSpread Spectrum Control Set Password Save & Exit Setup Exit Without SavingProgramming Watchdog Timer Appendix a Watchdog Timer Programming Data Time Interval 01 0.25 secPin Assignment Appendix B Pin Assignment CompactFlash Interface Table B.2 CompactFlash Interface Pin DefinitionsVGA Connector USB 2.0 PortsPS/2 Keyboard and Mouse Connector COM portEthernet 10/100/1000Base-T RJ-45 Connector Secondary IDE 44-pin 2mm ConnTable B.7 Secondary IDE Connectors 2.5 HDD Serial ATA0 7pin connector