Intel 21143 manual Signal Routing and Placement, Ground and Power Planes

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Intel® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller

5.0Signal Routing and Placement

The Ethernet circuitry should be kept free of interference from unrelated signal traces. Routing for other signals must be kept away from the space surrounding the grouped Ethernet components. Place the Ethernet circuitry at the perimeter of the board, as close as possible to the network connector.

The onchip crystal oscillator requires an external crystal and discrete components. For stable and noise-free operation, place the crystal and discrete components as close as possible to the 21143, keeping the etch length as short as possible. Do not route any noisy signals in this area.

The PCI pin ordering is fully compatible with the PCI specification recommendation and can be easily routed within the specified etch limits of the PCI signals. This includes shared signal lengths of up to 3.8 cm (1.5 in) and the clock signal length of 6.41 cm (2.5 in).

Keep all signal paths short and route them as directly as possible.

Systems using 10BASE-T nodes can be connected by cables up to 100 m (328 ft.). As a result, signals that reach the board can be noisy and low in amplitude. To minimize corrupting this data, route these signals, by most direct path, from the network connector and through the magnetics coupler to the 21143.

The length of this path should not exceed 8 cm (3 in) for the active AUI signals. The MII/SYM interface operates at 25 MHz (or 2.5 MHz). All routing of the MII/SYM signals to the MII/SYM device should be as short as possible and should not have significant differences of lengths and characteristics within signal groups. Examples of signal groups include mii_rxd<4:0> and mii_txd<4:0>.

Note: The routing of these signals should be done with caution. The preferred routing of these signals is in the external routing layers of the board. The MII/SYM device should be located between the 21143 and the magnetics port.

5.1Ground and Power Planes

Up to four types of power signals require handling when implementing a design with the 21143:

Gnd is adapter ground.

Vcc (+5 V from PCI) drives the external components (boot ROM and Ethernet address ROM).

Vdd (+3.3 V) drives the 21143.

Vee (-9 V output) power from the DC-to-DC converter if the coaxial network connection is implemented. For information specific to the -9 V power supply, refer to the transceiver used to drive the coaxial network connection.

Intel recommends that at least two power planes be kept on the PCB: Vcc and Gnd. The Vdd power plane (+3.3 V) can be implemented either by a cut in the Vcc power plane, or by a power island under the 21143 on one of the signal routing layers.

Intel recommends that decoupling capacitors should be connected to all power supplies. These capacitors should be placed as close as possible to the power pins of the chips. The recommended values are as follows: 0.1 µF, 0.01 µF, 10 µF (tantalum), and 47 µF (tantalum).

For better noise-testing immunity, separate all power planes between the network connectors and the transformer from the logic and analog power planes of the adapter for the 10BASE-T, 10BASE2, 100BASE-T4, and 100BASE-TX connections.

Design Guide

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Contents Design Guide Intel 21143 PCI/CardBus 10/ 100Mb/s Ethernet LAN ControllerDesign Guide Contents Revision History TablesDate Revision Description 001 First releaseFunctional Overview Signal gep0/auibnc Description21143 Overview Network InterfaceSYM-Based PHY Block Diagram MII-Based PHY Block DiagramTwisted-Pair Signals AUI SignalsSignal Pin Number 21143 PortsSYM Signals MII Signals10BASE-T Twisted-Pair Network Port Network ConnectionBASE-T Network Connection with Buffers BASE-T Network Connection Without Buffers Minimum Components Required for 10BASE-T Ready DesignsInternal vs. External Design Features Description of 100-Ready Daughtercard Block DiagramDesign Features Internal Optional Daughtercard3 100-Ready External Module Design Description of 100-Ready External Module Block Diagram5 MII/SYM Pin Listing MII/SYM Pinout Sheet 1MII/SYM Pinout Sheet 2 AUI Network PortAUI 10BASE5 Network and Pin Connections AUI 10BASE2 Network Connection Media-Specific Components Access Type Components Available Part NumbersBASE-T Media-Specific Components BASE2 and 10BASE5 Media-Specific Components21143 Requirements Pin Requirements When Not Using the Jtag PortUnused Jtag Port Requirements Current Reference and Capacitor Input RequirementsCrystal Specifications Specification Value UnitsCrystal and Crystal Oscillator Connections Ground and Power Planes Signal Routing and Placement1 3.3 V Power Supply LED Status SignalsDesign Considerations Suggestions for Quiet Ground and Power PlanesDesigning the Ethernet Corner on Motherboards Suggestions for FCC ComplianceSuggestions for Routing

21143 specifications

The Intel 21143 is a widely recognized Ethernet controller that has played a significant role in the development of networking technology throughout the late 1990s and early 2000s. This controller, part of Intel's line of networking solutions, was designed primarily for desktop and server systems, catering to the needs of both home and enterprise-level networking.

One of the main features of the Intel 21143 is its support for the IEEE 802.3 standard, allowing it to facilitate Ethernet networking at speeds of up to 100 Mbps. The 21143 supports both the 10Base-T and 100Base-TX Ethernet standards, making it versatile for different network environments. Its ability to auto-negotiate between these speeds ensures compatibility with a wide range of network devices, enhancing its utility in mixed-speed networks.

The Intel 21143 employs an advanced shared memory architecture that enables efficient data transfer and reduces CPU overhead. This feature ensures that the controller can handle higher throughput while allowing the CPU to focus on other tasks. Additionally, the controller supports a direct memory access (DMA) transmission capability, providing further enhancements in data handling and overall system performance.

An important characteristic of the Intel 21143 is its onboard processor, which allows it to offload certain networking tasks from the host CPU. This results in improved overall system performance, as the main processor is freed from handling all network traffic. The controller supports Full Duplex operation, enabling simultaneous sending and receiving of data, effectively doubling the potential bandwidth for each connection.

Another notable technology integrated into the Intel 21143 is its built-in support for TCP/IP checksum calculations. By offloading this computationally intensive task from the CPU, the controller enhances network performance, particularly in data-intensive applications such as file transfers and video streaming.

The Intel 21143 was primarily used in PCI (Peripheral Component Interconnect) applications, which facilitated ease of integration into existing systems. Its compatibility with various operating systems, including Windows and Linux, made it a popular choice among developers and users alike.

Overall, the Intel 21143 Ethernet controller has been instrumental in evolving networking technology. Its impressive features, efficient architecture, and robust performance have solidified its position in the market, paving the way for future advancements in Ethernet networking. Even today, the principles and technologies introduced with the Intel 21143 continue to influence modern networking solutions.