Emerson MVME55006E manual PCI Slave Image 4

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MOTLoad Firmware

Default VME Settings

 

 

Sets LSI1_TO to indicate that the PCI memory address is to be translated by 0x70000000 before presentation on the VMEbus; the result of the translation is: 0x91000000 + 0x70000000 = 0x101000000, thus 0x01000000 on the VMEbus.

zPCI Slave Image 2 Control = C0410000

Sets LSI2_CTL to indicate that this image is enabled, write posting is enabled, VMEbus data width is 16 bits, VMEbus address space is A24, data and non-supervisory AM encoding, no BLT transfers to the VMEbus, and to accept addresses in PCI memory space.

zPCI Slave Image 2 Base Address Register = B0000000

Sets LSI2_BS to indicate that the lower bound of PCI memory addresses to be transferred to the VMEbus by this image is 0xB0000000.

zPCI Slave Image 2 Bound Address Register = B1000000

Sets LSI2_BD to indicate that the upper bound of PCI memory addresses to be transferred by this image is 0xB1000000.

zPCI Slave Image 2 Translation Offset = 400000000

Sets LSI2_TO to indicate that the PCI memory address is to be translated by 0x40000000 before presentation on the VMEbus; the result of the translation is: 0xB0000000 + 0x40000000 = 0xF0000000, thus 0xF0000000 on the VMEbus.

zPCI Slave Image 3 Control = C0400000

Sets LSI3_CTL to indicate that this image is enabled, write posting is enabled, VMEbus data width is 16 bits, VMEbus address space is A16, data and non-supervisory AM encoding, no BLT transfers to the VMEbus, and to accept addresses in PCI memory space.

zPCI Slave Image 3 Base Address Register = B3FF0000

Sets LSI3_BS to indicate that the lower bound of PCI memory addresses to be transferred to the VMEbus by this image is 0xB3FF0000.

zPCI Slave Image 3 Bound Address Register = B4000000

Sets LSI3_BD to indicate that the upper bound of PCI memory addresses to be transferred by this image is 0xB4000000.

zPCI Slave Image 3 Translation Offset = 4C000000

Sets LSI3_TO to indicate that the PCI memory address is to be translated by 0x4C000000 before presentation on the VMEbus; the result of the translation is: 0xB3FF0000 + 0x4C000000 = 0xFFFF0000, thus 0xFFFF0000 on the VMEbus.

zPCI Slave Image 4 -7

These images are set to zeroes and thus disabled.

zVMEbus Slave Image 0 Control = E0F20000

Sets VSI0_CTL to indicate that this image is enabled, write and read posting is enabled, program/data and supervisory AM coding, data width is 32 bits, VMEbus A32 address space, 64-bit PCI transfers are disabled, PCI Lock on RMW cycles are disabled, and to transfer into PCI memory space.

zVMEbus Slave Image 0 Base Address Register = 00000000

Sets VSI0_BS to define the lower bound of VME addresses to be transferred to the local PCI bus is 0x00000000.

zVMEbus Slave Image 0 Bound Address Register = (Local DRAM Size)

Sets VSI0_BD to define that the upper bound of VME addresses to be equal to the size of local DRAM.

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MVME55006E Single-Board Computer Installation and Use (6806800A37D)

Image 62
Contents MVME55006E Single-Board Computer Contact Address Contents Contents RAM55006E Memory Expansion ModuleSpecifications Related Documentation List of Tables List of Tables 14 VIO Keying Pin Settings List of FiguresList of Figures Overview of Contents About this ManualNotation Description ConventionsAbout this Manual Model Number Description BoldAbout this Manual Notation Description Summary of ChangesComments and Suggestions Date Change ReplacesAbout this Manual Introduction Hardware Preparation and InstallationOverview Getting StartedUnpacking Guidelines Overview of Startup ProceduresHardware Preparation and Installation Startup OverviewConfiguring the Hardware Configuring the HardwareJumpers Switches Function Settings Configuring the BoardMVME5500 Jumper Settings Items in brackets are factory default settings Configuring the BoardHardware Preparation and InstallationEthernet 2.2 PMC/SBC Mode Selection Front Panel and Rear P2 Ethernet Settings J102 J110 SettingsFlash Boot Bank Select Header J8 Flash Boot Bank Select Header J8Flash 0 Programming Enable Switch S3-1 S5-1 Settings Safe Start ENV Switch S5-1Flash 0 Block Write Protect Switch S3-2 Srom Initialization Enable Switch S5-2 Srom Initialization Enable Switch S5-2PCI Bus 0.0 Speed Switch S4-1 S4-2 Settings PCI Bus 1.0 Speed Switch S4-2J27 Settings VME Scon Select Header J27S3-3 Settings Eeprom Write Protect Switch S3-3Setting the PMC Vio Keying Pin Eeprom Write Protect Switch S3-3Installing the RAM5500 Module ProcedureMounting the PMC Module Installing PMCsInstalling PMCs 15 Typical Placement of a PMC Module on a VME Module Primary PMCspan16 PMCspan Installation on a VME Module Primary PMCspanSecondary PMCspan Installing the Board Installing the BoardConnection to Peripherals MVME5500 ConnectorsConnector Function Completing the Installation Applying PowerSwitches and Indicators Startup and OperationFront-Panel LED Status Indicators Function Label Color DescriptionBlock Diagram Functional DescriptionFeature Description FeaturesMVME5500 Features Summary Functional DescriptionSystem Controller ProcessorL3 Cache ProcessorFunctional DescriptionInterrupt Controller CPU Bus InterfaceMemory Controller Interface 4 I2C Serial Interface and DevicesDirect Memory Access DMA Direct Memory Access DMATimers Flash MemoryGigabit Ethernet Interface System MemoryPCI Local Buses and Devices 2 10/100Mb Ethernet InterfacePCI Idsel Definition PCI-to-PCI BridgesPMC Sites PCI Bus ArbitrationAsynchronous Serial Ports Real Time Clock and NvramVME Interface Sources of ResetSystem Control and Status Registers PMC ExpansionDebug Support Functional Description RAM5500 Feature SummaryRAM55006E Memory Expansion Module 1 RAM5500 DescriptionClocks Memory Expansion Connector Pin AssignmentsSrom RAM55006E Memory Expansion ModulePin Signal RAM5500 Connector P1 Pin AssignmentsMemory Expansion Connector Pin Assignments CKD00 CKD01 CKD02 CKD03 CKD04 CKD05 Serial Presence Detect SPD Data RAM5500 Programming IssuesRAM5500 Programming IssuesRAM55006E Memory Expansion Module Serial Presence Detect SPD Data Implementation and Memory Requirements MOTLoad CommandsMOTLoad Firmware MOTLoad Firmware UtilitiesTests Command List Command ListMOTLoad Commands Command DescriptionMOTLoad FirmwareCommand List Command ListMOTLoad Firmware MOTLoad Commands Using the Command Line Interface Using the Command Line InterfaceMOTLoad FirmwareRules HelpFirmware SettingsMOTLoad Firmware Firmware SettingsDefault VME Settings PCI Slave Image 4 Default VME Settings VMEbus Slave Image 0 Translation Offset =1.1 CR/CSR Settings Deleting VME Settings Remote Start Connector Pin Assignments ConnectorsCOM1 Connector J1 Pin Assignments Asynchronous Serial Port Connector J1Ethernet Connectors J2 Ethernet Connector J2 Pin AssignmentsIpmc Connector J3 Ipmc Connector J3Ipmc Connector J3 Pin Assignments 4 PCI/PMC Expansion Connector J4 PCI/PMC Expansion Connector J4 Pin AssignmentsPCI/PMC Expansion Connector J4Connector Pin Assignments AD1 AD0 AD3 AD2 AD5 AD4 AD7 AD6 AD9 AD8Connector Pin AssignmentsCPU COP Connector J5 CPU COP Connector J5CPU COP Connector J5 Pin Assignments PMC 1 Interface Connectors J11, J12, J13, J14 PMC 1 Interface Connectors J11, J12, J13, J14PMC 1 Connector J11 Pin Assignments PMC 1 Connector J12 Pin Assignments PMC 1 Connector J13 Pin Assignments PMC 1 Connector J14 Pin Assignments 10 Boundary Scan Connector J18 Pin Assignments Boundary Scan Connector J18PMC 2 Interface Connectors J21, J22, J23, J24 11 PMC 2 Connector J21 Pin Assignments12 PMC 2 Connector J22 Pin Assignments 13 PMC 2 Connector J23 Pin Assignments 14 PMC 2 Connector J24 Pin Assignments Asynchronous Serial Port COM2 Planar Connector J33 15 COM2 Planar Connector J33 Pin AssignmentsPin VMEbus Connectors P1 & P2 PMC Mode16 VME Connector P2 Pin Assignments PMC Mode VMEbus Connectors P1 & P2 SBC Mode VMEbus Connectors P1 & P2 SBC ModeConnector Pin Assignments17 VME Connector P2 Pinout with IPMC712 Pin Row Z Row a Row B Row C Row D18 VME Connector P2 Pinouts with IPMC761 VMEbus Connectors P1 & P2 SBC ModeMemory Expansion Connector P4 19 Memory Expansion Connector P4 Pin AssignmentsMemory Expansion Connector P4Connector Pin Assignments Connector Pin AssignmentsHeaders HeadersJ98 J99 Pin Signal J34 J97J100 J101 22 PMC/SBC Mode Selection Headers J28, J32 Pin Assignments J28 J32 Pin Signal23 P2 I/O Selection Headers J102 J110 Pin Assignments SBC/IPMC712 Mode SBC/IPMC761 Mode PMC Mode 24 Flash Boot Bank Select Header J8 Pin Assignments 25 VME Scon Select Header J27 Pin AssignmentsConnector Pin Assignments Environmental Specifications SpecificationsPower Requirements Supply Current RequirementsSpecificationsEnvironmental Specifications 207,058 hoursTable B-1 Thermally Significant Components Thermal ValidationThermally Significant Components Thermal ValidationThermally Significant Components 100Preparation Component Temperature MeasurementComponent Temperature Measurement Measuring Case Temperature Measuring Junction TemperatureMeasuring Local Air Temperature Thermal ValidationMeasuring Case Temperature Figure B-4 Machining a Heatsink104 Manufacturers’ Documents Emerson Network Power Embedded Computing DocumentsRelated Documentation Table C-2 Manufacturers’ DocumentsRelated DocumentationManufacturers’ Documents 106Related Specifications Related SpecificationsTable C-3 Related Specifications Document Title and Source Or Search TermRelated Documentation 108Index Numerics110