Philips Semiconductors | ISP1301 USB OTG Transceiver Eval Kit User’s Guide |
6.2.4.Power manager
This block includes the 5.0
6.2.5.Audio interface
This block provides stereo audio line IN interface and microphone (with
7. Connector pin information
7.1.DB-25 PC parallel port connector (J10) pin assignment
J10 is used to connect to the PC parallel port through the
Table
Pin no | Printer port signal | ISP1301 evaluation board signal |
9 | D7 | SDAOUT# |
11 | S7# | SDAIN# |
15 | S3 | SCLIN |
17 | C3# | SCLOUT# |
— | GND | |
— | No connection |
7.2.
J13 is used to connect to a generic
Note: We use a 20 x 2 header to make it compatible with the Philips ISP1362 and ISP1161x ISA interface boards.
Table
Pin no | Pin name | Pin no | Pin name | Pin no | Pin name | Pin no | Pin name |
1 | GND | 11 | n. c. | 21 | D7 | 31 | D2 |
2 | n. c. | 12 | +3.3 V | 22 | INT2 | 32 | n. c. |
3 | n. c. | 13 | n. c. | 23 | D6 | 33 | D1 |
4 | CHRG_EN | 14 | n. c. | 24 | INT1 | 34 | WR_N |
5 | n. c. | 15 | n. c. | 25 | D5 | 35 | D0 |
6 | n. c. | 16 | +5.0 V | 26 | n. c. | 36 | RD_N |
7 | n. c. | 17 | n. c. | 27 | D4 | 37 | n. c. |
8 | n. c. | 18 | +5.0 V | 28 | n. c. | 38 | CS_N |
9 | n. c. | 19 | GND | 29 | D3 | 39 | A0 |
10 | +3.3 V | 20 | n. c. | 30 | n. c. | 40 | n. c. |
[1] n.
Note: An external OTG Controller system can use the CHRG_EN signal to enable or disable +5.0 V from the VBUS line of the
7.3.USB OTG Controller interface 8 x 2 header (J8 and J3) pin assignment
Header connectors J8 and J3 are used to connect the ISP1301 to the OTG Controller core. J8 includes the USB Serial Interface Engine (SIE)
UM10028_1 |
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User’s Guide | Rev. | 13 of 18 |