Black Box IC187C, IC133C-R2 manual Appendix D Asynchronous Communication

Page 31

2-PORT RS-232/422/485 PCI HOST ADAPTER

Appendix D:

Asynchronous Communication

In serial data communication, individual bits of a character are transmitted consecutively to a receiver that assembles the bits back into a character. Data rate, error checking, handshaking, and character framing (start/stop bits) are pre- defined and must correspond at both the transmitting and receiving ends.

Asynchronous communications is the standard means of serial data communication for PC compatibles and PS/2 computers. The original PC was equipped with a communication or COM port that was designed around an 8250 Universal Asynchronous Receiver Transmitter (UART). This device allows asynchronous serial data to be transferred through a simple and straightforward programming interface. A start bit, followed by a pre-defined number of data bits (5, 6, 7, or 8), defines character boundaries for asynchronous communications. The end of the character is defined by the transmission of a pre-defined number of stop bits (usually 1, 1.5, or 2).

Idle State

of

Line

1

0

 

 

Odd

 

 

 

 

 

 

 

 

 

 

 

 

Even

 

 

 

 

 

 

Remain Idle

 

 

or

 

 

 

 

 

 

 

 

or

5 to 8 Data Bits

 

Unused

 

 

 

 

 

 

Next Start Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parity

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Stop Bits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure D-1. Bit diagram for asynchronous communication.

An extra bit used for error detection is often appended before the stop bits. This special bit is called the parity bit. Parity is a simple method of determining if a data bit has been lost or corrupted during transmission. There are several methods for implementing a parity check to guard against data corruption. Common methods are called (E)ven Parity or (O)dd Parity. Sometimes parity is not used to detect errors on the data stream. This is refereed to as (N)o parity.

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Image 31 Contents
Port RS-232/422/485 PCI Host Adapter FCC and IC Statements Port RS-232/422/485 PCI Host Adapter NOM Statement Trademarks Table of Contents Contents Number of Ports 2 RS-232/422/485 Connectors 2 DB9 male SpecificationsOverview IntroductionWhat’s Included Introduction Factory Default SettingsRS-485 Enable Modes Card SetupCard Setup Line Termination Address and IRQ selectionName Function Electrical Interface Selection RS-232 and RS-422/485Clock Modes DIV1 DIV2 DIV410. Clocking mode divide by Baud Rates and Divisors for the Div1 ModeFor this Data Rate Choose this Divisor Baud Rates and Divisors for the Div2 mode Divisors for the Div 2 Mode Setting Up the Operating System InstallationInstallation Installing the HardwareSerial Utility Diskette TroubleshootingShipping and Packaging Calling Black BoxPurpose and Early History of Interrupts Appendix a Interrupt HandlingWhy Use an Interrupt Status Port ISP? RS-232 Appendix B Connector PinoutsRS-422/485 RS-422 Appendix C Electrical InterfacesRS-485 Appendix D Asynchronous Communication Figure D-1. Bit diagram for asynchronous communicationAppendix D Asynchronous Communication J2C Appendix E Board LayoutPage Page Copyright 2000. Black Box Corporation. All rights reserved
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