Black Box IC133C-R2, IC187C manual Why Use an Interrupt Status Port ISP?

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APPENDIX A: Interrupt Handling

A.2 Why Use an Interrupt Status Port (ISP)?

The answer to the polling inefficiency was the Interrupt Status Port (ISP). The ISP is a read-only 8-bit register that sets a corresponding bit when an interrupt is pending. Port 1’s interrupt line corresponds with bit D0 of the status port, Port 2’s with D1, etc. The use of this port means that the software designer now only has to poll a single port to determine if an interrupt is pending.

The ISP is at “base+7” on each port. For example, if the base = 280 hex, the status port = 287 hex, 28F hex, and so on. The Adapter will allow any one of the available locations to be read to obtain the value in the status register. Both status ports on the Adapter are identical, so either one can be read.

Example: This indicates that Channel 2 has an interrupt pending:

Bit Position:

7

6

5

4

3

2

1

0

Value Read:

0

0

0

0

0

0

1

0

25

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Contents Port RS-232/422/485 PCI Host Adapter FCC and IC Statements Port RS-232/422/485 PCI Host Adapter NOM Statement Trademarks Table of Contents Contents Specifications Number of Ports 2 RS-232/422/485 Connectors 2 DB9 maleWhat’s Included IntroductionOverview Factory Default Settings IntroductionCard Setup RS-485 Enable ModesCard Setup Address and IRQ selection Line TerminationName Function RS-232 and RS-422/485 Electrical Interface SelectionDIV1 DIV2 DIV4 Clock ModesBaud Rates and Divisors for the Div1 Mode 10. Clocking mode divide byFor this Data Rate Choose this Divisor Baud Rates and Divisors for the Div2 mode Divisors for the Div 2 Mode Installation Setting Up the Operating SystemInstalling the Hardware InstallationTroubleshooting Serial Utility DisketteCalling Black Box Shipping and PackagingAppendix a Interrupt Handling Purpose and Early History of InterruptsWhy Use an Interrupt Status Port ISP? Appendix B Connector Pinouts RS-232RS-422/485 Appendix C Electrical Interfaces RS-422RS-485 Figure D-1. Bit diagram for asynchronous communication Appendix D Asynchronous CommunicationAppendix D Asynchronous Communication Appendix E Board Layout J2CPage Page Copyright 2000. Black Box Corporation. All rights reserved