IBM EM78P447N manual TCC/WDT & Prescaler, TCC and WDT Block Diagram

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EM78P447N

8-Bit Microcontroller with OTP ROM

4.3 TCC/WDT & Prescaler

An 8-bit counter is available as prescaler for the TCC or WDT. The prescaler is available for either the TCC or WDT only at any given time, and the PAB bit of the CONT register is used to determine the prescaler assignment. The PSR0~PSR2 bits determine the ratio. The prescaler is cleared each time the instruction is written to TCC under TCC mode. The WDT and prescaler, when assigned to WDT mode, are cleared by the “WDTC” or “SLEP” instructions. Fig. 6 depicts the circuit diagram of TCC/WDT.

R1 (TCC) is an 8-bit timer/counter. The clock source of TCC can be internal or external clock input (edge selectable from TCC pin). If TCC signal source is from internal clock, TCC will increase by 1 at every instruction cycle (without prescaler). Referring to Fig. 6, CLK=Fosc/2 or CLK=Fosc/4 selection is determined by the CODE Option bit CLK status. CLK=Fosc/2 is used if CLK bit is "0", and CLK=Fosc/4 is used if CLK bit is "1". If TCC signal source comes from external clock input, TCC is increased by 1 at every falling edge or rising edge of TCC pin.

The watchdog timer is a free running on-chip RC oscillator. The WDT will keep on running even after the oscillator driver has been turned off (i.e. in sleep mode). During normal operation or sleep mode, a WDT time-out (if enabled) will cause the device to reset. The WDT can be enabled or disabled any time during normal mode by software programming. Refer to WDTE bit of IOCE register. Without prescaler, the WDT time-out period is approximately 18 ms2 (default).

CLK(=Fosc/2)

Data Bus

TCC

Pin

TE

WDT

WDTE

(in IOCE)

0

M

1

M

SYNC

 

 

 

TCC(R1)

 

U

 

U

2 cycles

1

X

 

X

 

0

 

 

 

 

 

 

 

 

TS

 

PAB

TCC overflow interrupt

 

 

 

 

0

M

 

 

 

 

 

 

8-bit Counter

 

 

U

 

 

1

X

 

 

 

PSR0~PSR2

 

 

8-to-1 MUX

 

 

 

 

PAB

 

 

 

 

0

1

 

 

 

 

 

 

 

 

 

MUX

PAB

WDT timeuot

Fig. 6 TCC and WDT Block Diagram

2<Note>: Vdd = 5V, set up time period = 16.2ms ± 30% Vdd = 3V, set up time period = 19.6ms ± 30%

Product Specification (V1.1) 03.30.2005

15

(This specification is subject to change without further notice)

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Contents EM78P447N Elan Microelectronics Corporation Contents Specification Revision History General Description EM78P447NBWM PIN Assignment EM78P447NAP and EM78P447NAM Pin Description Symbol Pin No Type FunctionEM78P447NAS Pin Description EM78P447NBP and EM78P447NBWM Pin Description Power supplyEM78P447NCK and EN78P447NCM Pin Description EM78P447NDK and EM78P447NDM Pin Description Function Description3 R2 Program Counter & Stack Operational Registers1 R0 Indirect Addressing Register 2 R1 Time Clock /CounterFffh Call RET Retl RetiData Memory Configuration R5, R6 and R7 are I/O registers 5 R4 RAM Select Register6 R5~R7 Port 5 ~ Port7 7 R8~R1F and R20~R3E General Purpose RegisterControl Register Special Purpose Registers8 R3F Interrupt Status Register AccumulatorWDT Rate 3 IOC5 ~ IOC7 I/O Port Control RegisterIocb Wake-up Control Register for Port6 TCC RateWUE Ioce WDT Control RegisterExie Iocf Interrupt Mask RegisterTCC/WDT & Prescaler TCC and WDT Block DiagramIOD I/O PortsReset Reset and Wake-upSLEEP2 SLEEP1 Usage of Sleep1 and Sleep2 ModeSummary of the Initialized Values for Registers Address Name Reset Type BitIocb R3FISRExif Tcif WUE7 WUE6 WUE5 WUE4Events that may Affect the T and P Status Previous status before resetPrevious value before reset Status of RST, T, and P of Status RegisterInterrupt Controller Reset Block DiagramOscillator Modes OscillatorMode Fxt max.MHz Crystal Oscillator/Ceramic ResonatorsXTALSummary of Maximum Operating Speeds ConditionsLXT External RC Oscillator ModeOscillator Type Frequency Mode C1pF C2pF HXTCode Option Register Word Code Option RegisterProtect PR2~PR0 are protect bits, protect type as followingBit 12~0 Customer’s ID code Power On ConsiderationsExternal Power On Reset Circuit Customer ID Register WordResidue-Voltage Protection ResetInstruction Set Slep NOPDAA ContwRRC R Djza RDJZ R Rrca RAC Test Input/Output W aveform Timing DiagramItems Rating DC Electrical CharacteristicSymbol Parameter Condition Min Typ Max Unit Ta= 25 C, VDD= 5.0V±5%, VSS=Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=- -40 C ~ 85 C, VDD=5V ±5%, VSS=0V Vih, Vil of TCC, /INT, /RESET Pin Device characteristicPort5, Port6 Port7 Voh vs. Ioh,VDD=5V Port5, Port6, and Port7 Voh vs. Ioh, VDD=3V Vol/Iol VDD=5V Vol/Iol VDD=3V Vol/Iol 100 Vol/Iol WDT Cext=100pF, Typical RC OSC Frequency Typical ICC1 and ICC2 vs. Temperature Maximum ICC1 and ICC2 vs. Temperature Typical ISB1 and ISB2 vs. Temperature Maximum ISB1 and ISB2 vs. Temperature EM78P447N HXT ImA Package Type Pin Count Package Size Lead plastic dual inline package(DIP)- 300 milLead plastic dual inline package(DIP)- 600 mil Lead plastic dual inline skinny package(DIP)- 300 mil838 27TYP EM78P447N