EM78P447N
Address |
| Name |
| Reset Type |
| Bit 7 |
| Bit 6 |
| Bit 5 |
| Bit 4 |
| Bit 3 |
| Bit 2 |
| Bit 1 |
| Bit 0 |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
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0x05 |
| R5(P5) |
| Bit Name |
| P57 |
| P56 |
| P55 |
| P54 |
| P53 |
| P52 |
| P51 |
| P50 |
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| U |
| U |
| U |
| U |
| U |
| U |
| U |
| U |
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| /RESET and WDT |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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0x06 |
| R6(P6) |
| Bit Name |
| P67 |
| P66 |
| P65 |
| P64 |
| P63 |
| P62 |
| P61 |
| P60 |
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| U |
| U |
| U |
| U |
| U |
| U |
| U |
| U |
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| /RESET and WDT |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| Bit Name |
| P77 |
| P76 |
| P75 |
| P74 |
| P73 |
| P72 |
| P71 |
| P70 |
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0x07 |
| R7(P7) |
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| U |
| U |
| U |
| U |
| U |
| U |
| U |
| U |
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| /RESET and WDT |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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0x3F |
| R3F(ISR) |
| Bit Name |
| - |
| - |
| - |
| - |
| EXIF |
| - |
| - |
| TCIF |
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| U |
| U |
| U |
| U |
| 0 |
| U |
| U |
| 0 |
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| /RESET and WDT |
| U |
| U |
| U |
| U |
| 0 |
| U |
| U |
| 0 |
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| U |
| U |
| U |
| U |
| P |
| U |
| U |
| P |
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| Change |
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| Bit Name |
| /WUE7 |
| /WUE6 |
| /WUE5 |
| /WUE4 |
| /WUE3 |
| /WUE2 |
| /WUE1 |
| /WUE0 |
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0x0B |
| IOCB |
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| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
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| /RESET and WDT |
| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
| 1 |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| Change |
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| Bit Name |
| - |
| ODE |
| WDTE |
| SLPC |
| ROC |
| - |
| - |
| /WUE |
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0x0E |
| IOCE |
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| U |
| 0 |
| 1 |
| 1 |
| 0 |
| U |
| U |
| 1 |
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| /RESET and WDT |
| U |
| 0 |
| 1 |
| 1 |
| 0 |
| U |
| U |
| 1 |
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| U |
| P |
| 1 |
| 1 |
| P |
| U |
| U |
| P |
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| Change |
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0x0F |
| IOCF |
| Bit Name |
| - |
| - | - | - |
| EXIE |
| - | - |
| TCIE |
| |||
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| U |
| U |
| U |
| U | 0 |
| U |
| U |
| 0 |
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| /RESET and WDT |
| U |
| U |
| U |
| U | 0 |
| U |
| U |
| 0 |
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| U |
| U |
| U |
| U |
| P |
| U |
| U |
| P |
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| Change |
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0x08 |
| R8 |
| Bit Name |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
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| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
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| /RESET and WDT |
| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
| 0 |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| Change |
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| Bit Name |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
|
0x09~0x3E |
| R9~R3E |
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| U |
| U |
| U |
| U |
| U |
| U |
| U |
| U |
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| /RESET and WDT |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| Change |
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**To execute next instruction after the ”SLPC” bit status of IOCE register being on
X:Not used. U: Unknown or don’t care. P: Previous value before reset. t: Check Table 7
20 • | Product Specification (V1.1) 03.30.2005 |
(This specification is subject to change without further notice)