Sun Microsystems S16A Direct I/O Registers, DAC Output Control Register, DIO Direction Register

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Registers

 

S16A User’s Guide

 

 

 

Bit

S16A_

Description

 

 

 

 

 

 

24

BURST_EN

A value of 1 enables burst transfer. For channels 0 & 1 must be 0; for

 

 

channels 2 & 3 must be 1.

 

 

 

23–20

 

Unused. 0 when read.

 

 

 

19–2

SIZ_MSK

Number of words to transfer in the next DMA transfer. When the next DMA

 

 

starts, this value is copied into the corresponding bits of the current count

 

 

register.

 

 

 

1–0

CNT_MSK

Always 0. S16A DMA transfers consist of whole 32-bit words.

 

 

 

Table 10. Control and Next Count Registers (Continued)

Direct I/O Registers

The S16A provides 12 pins in its external connector that can be used for general-purpose I/O signals. Each pin can be configured as either an input signal or an output signal. Signal levels are TTL-level (0 or +5 volt) with 1 KOhm source impedance. The following sections describe how to access these signals.

DIO Direction Register

The DIO Direction register is a 32-bit register at address 0x40040. This register configures the 12 DIO pins in the S16A connector to be either input or output. Each of the low 12 bits in this register controls the corresponding DIO signal: if the bit is set, the pin is an output signal; if the bit is clear, the pin is an input signal.

DIO Data Register

The DIO Data register is a 32-bit register at address 0x40044. The low 12 bits in this register reflect the state of the corresponding DIO pins in the S16A connector. Writes to this register set the states of the pins that have been configured to be output signals; reads return the states of the pins that have been configured to be input signals.

DAC Output Control Register

The DAC Output Control register is a 32-bit register at address 0x40080. This register controls the output analog converters. Each of the two channels’ output converters can be enabled or disabled, and can be configured for 16-bit or 20-bit DAC operation. In 16-bit mode, each sample uses two bytes of DMA data; in 20-bit mode, each sample uses four bytes of DMA data.

Upon the first open of an I/O channel for output, the driver enables the channel and configures it for 20-bit operation. The operational mode can then be changed by a library or ioctl call after the channel is opened. When the channel is closed, the driver clears the enable bit, disabling the output.

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EDT, Inc. October, 1996

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Contents S16A EDT, Inc. October Contents Tables Overview Installing the Software InstallationInstalling the Hardware Using SunOS VersionS16A User’s Guide Installation Using System V Release 4 Solaris 2.4 or Later Building the Sample ProgramsIncluded Files ReadmeInput and Output Elements of S16A ApplicationsRoutine Description DMA Library RoutinesGeneral DMA Library Routines Syntax S16abufferaddressesS16A-specific Library Routines ArgumentsS16acancelcurrent S16acancelS16achecknextbuffer S16aclose S16aconfigureringbuffers ArgumentsS16adone S16agetdaccontrolregS16agetdiodatareg S16agetdiodirectionregS16agetoutputbits S16aopenS16aread S16aserialreadS16aserialstr S16aserialwriteS16asetdefaults S16asetdaccontrolregS16asetdiodatareg S16asetdiodirectionregS16asetoutputbits S16astartbuffersS16astopbuffers S16awaitforbufferS16awaitfornextbuffer S16awriteFoiparityerror Error ConditionsError Codes and Conditions Hardware Interface Electrical InterfaceSignal S16A I/O Description Interface SignalsS16A Interface Signals Pin Signal Connector PinoutConnector Pinout Registers SBus Addresses S16A ROMCurrent DMA Address Registers DMA RegistersNext DMA Address Registers Current Count Registers Control and Next Count RegistersDIO Direction Register Direct I/O RegistersDAC Output Control Register DIO Data RegisterName Description Analog Input Module Internal RegistersDAC Output Control Register Analog Input Module Internal RegistersInput Configuration Registers Input Clock Prescale RegistersTrim Register Use Trim RegistersInput Gain High Byte Values Trim Registers Trim Output Offset RegistersAnalog Input Module Control Protocol Temperature RegisterAnalog Input Module Uart Registers Trim Input Gain RegistersWrite to a Clock Prescale Register Write to an Input Configuration RegisterRead from an Input Configuration Register Read from a Clock Prescale RegisterUart Command/Status Register Uart Command/Status RegisterRead the Temperature Register Write to a Trim RegisterXilinx Programming Registers Uart Data RegisterSpecifications References Contacting EDT Index 15-16Configuration ROM
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