Quatech DSC-200/300 user manual Options Register, Bit Name Description

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4.4 Options Register

The Options Register allows software to identify the DSC-200/300 as a Quatech Enhanced Serial Adapter. It also allows software to set the UART clock rate multiplier. Figure 10 shows the structure of the Options Register.

The powerup default of the Options Register is all bits zero.

Bit

Name

Description

 

 

 

7 (MSB)

ID1

ID bit 1

 

 

 

6

ID0

ID bit 0

 

 

 

5

-

(reserved, 0)

 

 

 

4

-

(reserved, 0)

 

 

 

3

-

(reserved, 0)

 

 

 

2

-

(reserved, 0)

 

 

 

1

RR1

Clock rate multiplier bit 1

 

 

 

0

RR0

Clock rate multiplier bit 0

 

 

 

Figure 10--- Options Register bit definitions

4.4.1 Enhanced Serial Adapter Identification

The ID bits are used to identify the DSC-200/300 as a Quatech Enhanced Serial Adapter. Logic operations are performed such that the values read back from these bits will not necessarily be the values that were written to them. Bit ID1 will return the logical-AND of the values written to ID[1:0], while bit ID0 will return their exclusive-OR.

Software can thus identify a Quatech Enhanced Serial Adapter by writing the ID bits with the patterns shown in the "write" column of Figure 11, then reading the bits and comparing the result with the patterns in the "read" column. Matching read patterns verify the presence of the Options Register.

Write

Read

ID1

ID0

ID1

ID0

0

0

0

0

0

1

0

1

1

0

0

1

1

1

1

0

Figure 11 --- ID bit write/read table

Quatech DSC-200/300 User's Manual

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Contents DSC-200/300 Warranty Information Page Declaration of Conformity Manufacturers Name RS-422 or RS-485 Signal Line Termination Using the New Hardware Found WizardAddress Map and Special Registers Base Address and Interrupt Level IRQPage General Information Features IND Option --- Surge Suppression UpgradeHardware Configuration Factory default signal termination settingsSignal Connections Full-duplex/Half-duplex OperationEnable Scratchpad Register SPAD, J13 Clock Rate and Optional RegistersForce High-Speed Uart Clock X2, X4, or X8, J10-J12 Clock multiplier jumper optionsHardware Installation Jumper/connector locationsChannel Address Range Enabling the Special Registers Interrupt Status RegisterOptions Register Bit Name DescriptionClock Rate Multiplier RR1 RR0Windows Configuration Windows MillenniumWindows Windows Windows Page Using the New Hardware Found Wizard Windows NT DOS and Other Operating Systems QTPCI.EXEQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display OS/2 External Connections Jumper/Channel correspondenceRTS/CTS Handshake RclkXclk AUXIN/AUXOUT LoopbackHalf-Duplex/Full-Duplex Selection Half- or full-duplex selection Termination Resistors RS-422/485 Line termination resistance valuesDSC-200/300 connector definitions RS-422/485 Peripheral ConnectionPCI Resource Map INTA#10Specifications Troubleshooting Computer will not boot upDSC-200/300 Revision March