Quatech DSC-200/300 user manual Clock Rate Multiplier, RR1 RR0

Page 17

4.4.2 Clock Rate Multiplier

A standard serial port operates at a clock speed of 1.8432 MHz. In order to achieve higher data rates, Quatech Enhanced Serial Adapters can operate at two times, four times, or even eight times this standard clock speed. This is controlled by the clock rate multiplier bits in the Options Register.

Software can determine the UART clock frequency by reading the clock rate multiplier bits RR1 and RR0 in the Options Register as shown in Figure 12. RR1 and RR0 can be set by writing to the Options Register if the X2, X4, and X8 jumpers (J10-J12) are all removed. If one of these jumpers is applied, the RR1 and RR0 bits are forced to the appropriate value. Reading the Options Register will always return the clock rate multiplier at which the board is operating.

RR1

RR0

Clock Rate

UART Clock

Maximum Data

Multiplier

Frequency

Rate

 

 

0

0

X1

1.8432 MHz

115.2 kbaud

(default)

 

 

 

 

0

1

X2

3.6864 MHz

230.4 kbaud

1

0

X4

7.3728 MHz

460.8 kbaud *

1

1

X8

14.7456 MHz

921.6 kbaud *

* 16750 UART only

Figure 12 --- Rate Register bit definition

At powerup and reset, the Options Register is initialized to 0. The DSC-200/300 will thus powerup in the x1 mode with software control of the clock rate multiplier enabled as long as the X2, X4, and X8 jumpers are not installed.

Software can control high baud rates through a combination of changing the clock rate multiplier and the UART baud rate divisor. For example, a baud rate of

230.4kbps could be achieved by setting the clock rate multiplier to X2 mode (or by applying the X2 jumper) and setting a software application for 115.2 kbps.

Quatech DSC-200/300 User's Manual

17

Image 17
Contents DSC-200/300 Warranty Information Page Declaration of Conformity Manufacturers Name Using the New Hardware Found Wizard RS-422 or RS-485 Signal Line TerminationAddress Map and Special Registers Base Address and Interrupt Level IRQPage General Information IND Option --- Surge Suppression Upgrade FeaturesFactory default signal termination settings Hardware ConfigurationFull-duplex/Half-duplex Operation Signal ConnectionsClock Rate and Optional Registers Enable Scratchpad Register SPAD, J13Clock multiplier jumper options Force High-Speed Uart Clock X2, X4, or X8, J10-J12Jumper/connector locations Hardware Installation Channel Address Range Interrupt Status Register Enabling the Special RegistersBit Name Description Options RegisterRR1 RR0 Clock Rate MultiplierWindows Millennium Windows ConfigurationWindows Windows Windows Page Using the New Hardware Found Wizard Windows NT QTPCI.EXE DOS and Other Operating SystemsQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display OS/2 Jumper/Channel correspondence External ConnectionsRclk RTS/CTS HandshakeAUXIN/AUXOUT Loopback XclkHalf-Duplex/Full-Duplex Selection Half- or full-duplex selection RS-422/485 Line termination resistance values Termination ResistorsRS-422/485 Peripheral Connection DSC-200/300 connector definitionsINTA# PCI Resource Map10Specifications Computer will not boot up TroubleshootingDSC-200/300 Revision March