Texas Instruments SPRAA56 appendix Modifications to the Base Example

Page 7

SPRAA56

2.2Requirements for Viewing RTA Benchmarks

In order for any of the DSP/BIOS-based RTA tools to be visible, the DSP/BIOS components in Code Composer Studio version 2.30 or earlier and version 3.0 require that the application’s .cdb configuration file be accessible and consistent with the executable .out file.

This requirement is easily met during development. It can also be satisfied in demonstrations or delivered test examples. If you do not want to deliver source code with the application for external testing or demonstration, you can still enable all the RTA tools by providing a current DSP/BIOS configuration .cdb file along with the executable .out file to be tested. The tester will be able to view the CPU load, individual thread statistics, and other important benchmark details described in the sections to follow.

The RTA tools can be used in stop mode or real-time mode. In the GBL module of the DSP/BIOS configuration, you can enable or disable real-time analysis. If you disable real-time analysis, the three RTA functions in the IDL background loop are removed. Those functions normally move RTA data from buffers on the DSP to the host PC and calculate the CPU load for the load graph.

When RTA is disabled, the Message Log, Statistics View, Execution Graph, and other RTA windows are updated only when the DSP is halted. An update displays the most recent contents of their respective buffers. This “stop mode” of RTA offers a good compromise when some visibility is required, but the additional code and background function calls are undesirable. Stop mode can also occur if RTA is enabled but the CPU is so heavily loaded that it never runs the IDL background loop long enough to provide real-time updates. In either case of stop-mode operation, the CPU Load Graph is not updated. However, the programmatic method for CPU load measurement discussed later in this application note provides a useful working alternative.

The next section describes structural modifications made to the application to make it more suitable for benchmarking and further development.

3Modifications to the Base Example

The application associated with this document has very few structural changes from the base application shipped with the TMS320DM642 evaluation module. Some variables have been renamed for readability, the encoder and decoder have been separated, and an additional task has been added for application control. The data flow in the application has not been modified.

The steps to convert the base example to the modified example are provided in a readme file in the directory that contains the source code.

Figure 2 shows a more detailed look at the data flow in the modified H.263 loopback example:

DSP/BIOS Real-Time Analysis (RTA) and Debugging Applied to a Video Application

7

Page 6 Page 8
Image 7
Page 6 Page 8
Contents References Appendix A. Performance Impact Modifications to the Base ExampleRTA Techniques for Performance Measurement Viewing Benchmarks in the Instrumented ApplicationFigures Important Benchmarks for Video ApplicationsSPRAA56 Base Application OverviewTskInput 1 LOG DSP/BIOS and RF5 Components Used3 TRC 2 STS4 UTL Requirements for Viewing RTA Benchmarks Modifications to the Base ExampleAdding the Control TSK and MBX Communication Splitting the Encode and Decode CELLsTskInput Querying the H.263 Encoder for StatusTskO utput Controlling the Frame Rate Measuring Function Execution Time with the UTL Module RTA Techniques for Performance MeasurementMeasuring End-to-End Latencies Measuring Task Scheduling LatenciesMeasuring the Frame Rate Programmatic Measurement of Total CPU Load Memory Bus Utilization External memory 720*480 = 345,600 B86,400 B 14,400 BBitrate and Frame Type Methods for Transmitting Measured Performance Data Application-Specific Control via GEL Scripts in CCStudio Viewing Benchmarks in the Instrumented ApplicationRequirements Load the h263loopbackrta.out program Running the ApplicationSPRAA56 Interpreting the Benchmarks Expected Values for the STS Objects Expected and Measured STS Benchmarks Expected and Measured Logged Benchmarks Debug ModeExpected Values Delivered to the Message Log Controlling the Run-Time Parameters DynamicallyCapture and Display Task Benchmarking ReferencesMeasured Performance of Benchmarking Techniques Appendix A. Performance ImpactOverhead of Performance Measurement Techniques RTA Effects on CPU LoadMemory Footprint Details Memory FootprintImportant Notice
Top Page Image Contents