Texas Instruments SPRAA56 appendix Memory Footprint Details

Page 28

SPRAA56

A.3 Memory Footprint

The total additional code size added to the application for the debugging features was 29 KB of external memory. This was calculated from the size of the .out file with benchmarking added (518 KB) and without benchmarking (491 KB).

All the footprint numbers in this appendix were obtained under the following conditions (expect where noted):

Platform: EVMDM624

Debug flags:

-g –ml3 -d"UTL_DBGLEVEL=70" -d"_DEBUG" -d"RTA_INCLUDED" -d"_NTSC" -d"CHIP_DM642" -ml3 -mv6400

Optimization:

-o2

DSP/BIOS:

version 4.90.27

RDTX:

enabled

LOG buffers:

2 * 4096(buffer size) + 1 * 256(buffer size) = 8448(8-bit bytes)

The real-time analysis footprint numbers in Table 4 were obtained using the setup described in Section 5.1, Requirements. All sizes are in 8-bit bytes.

 

Table 4.

Memory Footprint Details

 

 

 

 

 

 

 

All RTA Features

Remove

Remove UTL Calls

Remove Both

 

Enabled (as

–D"RTA_INCLUDED"

(Set

–D"RTA_INCLUDED"

 

shipped)

Build Option

UTL_DEBUGLEVEL=0)

Build Option and

 

 

 

 

UTL Calls

Code Size

11,406,788

11,405,076

11,402,856

11,401,272

Data Size

3347

3347

2643

2643

Bss + Stack

5392

5392

5392

5392

Total

11,415,527

11,413,815

11,410,891

11,409,307

Code Reduction

----

1712

3932

5516

Relative to Case # 1

 

(0.015% reduction)

(0.034% reduction)

(0.048% reduction)

Data Reduction

----

0 (0%)

704 (21% reduction)

704 (21% reduction)

Relative to Case # 1

 

 

 

 

Each STS object adds a one-time code size of 128 bytes plus an additional 16 bytes of data space. The STS objects are not removed in any cases in the table above. In this application, the total footprint impact due to STS objects is 496 bytes. (All bytes here are 8-bit bytes.)

Table 4 shows that the impact on space, especially code space, by real-time analysis instrumentation is negligible relative to the application size.

28DSP/BIOS Real-Time Analysis (RTA) and Debugging Applied to a Video Application

Image 28
Contents Modifications to the Base Example RTA Techniques for Performance MeasurementViewing Benchmarks in the Instrumented Application References Appendix A. Performance ImpactImportant Benchmarks for Video Applications FiguresBase Application Overview SPRAA56TskInput DSP/BIOS and RF5 Components Used 1 LOG3 TRC 2 STS4 UTL Modifications to the Base Example Requirements for Viewing RTA BenchmarksSplitting the Encode and Decode CELLs Adding the Control TSK and MBX CommunicationTskInput Querying the H.263 Encoder for StatusTskO utput Controlling the Frame Rate RTA Techniques for Performance Measurement Measuring Function Execution Time with the UTL ModuleMeasuring Task Scheduling Latencies Measuring End-to-End LatenciesMeasuring the Frame Rate Programmatic Measurement of Total CPU Load Memory Bus Utilization 720*480 = 345,600 B 86,400 B14,400 B External memoryBitrate and Frame Type Methods for Transmitting Measured Performance Data Application-Specific Control via GEL Scripts in CCStudio Viewing Benchmarks in the Instrumented ApplicationRequirements Running the Application Load the h263loopbackrta.out programSPRAA56 Interpreting the Benchmarks Expected Values for the STS Objects Expected and Measured STS Benchmarks Debug Mode Expected Values Delivered to the Message LogControlling the Run-Time Parameters Dynamically Expected and Measured Logged BenchmarksReferences Capture and Display Task BenchmarkingAppendix A. Performance Impact Overhead of Performance Measurement TechniquesRTA Effects on CPU Load Measured Performance of Benchmarking TechniquesMemory Footprint Memory Footprint DetailsImportant Notice