SPRAA56
Device |
| YAfter420 720x576 | bitBuf | |
| 414 KB |
| ||
Driver |
|
| ||
|
| 512 KB | ||
|
|
| ||
Buffer |
|
|
| |
Y uv |
|
|
| |
|
|
|
| |
3 frames | 422to |
| H .263 |
|
420 | C bAfter420 |
| ||
| enc |
| ||
|
|
| Shared | |
|
|
|
| |
|
| C rAfter420 |
| Scratch |
|
| 207 KB | 6 KB | 92 KB |
|
|
| ||
| scratch1 |
| Instance |
|
| 14 KB = 20 lines | m em ory |
| |
Key |
|
| Internal Memory | |
DMA Read/W rite (background) | External Memory | |||
CPU Read/W rite |
| DSP CPU Function |
| y |
| 414 KB |
H .263 | Cr |
dec | CbArrau |
| |
| Cb |
1.5 KB | 207 KB |
| |
Instance |
|
m em ory |
|
Y uv 422to 420
scratch2 14 KB
Device
Driver
Buffer
3 frames
Figure 2. Detailed Application Data Flow Showing Memory Buffers
Note: The dotted lines in Figure 2 indicate EDMA moves, and the solid lines indicate CPU reads/writes. The application performs only CPU reads/writes from mapped internal memory, relying on the EDMA to copy working data into internal scratch buffers.
3.1Splitting the Encode and Decode CELLs
In the base example, the H.263 encoder and decoder are wrapped in sequential CELLs in a single channel. This is suitable for an example application, but in actual video systems the input to the decoder would be an encoded bitstream from an external source, and the output from the encoder would be sent to an external source such as a network stream or a hard disk drive. Splitting the encoder and decoder into separate channels better supports external sourcing or transport of the encoded bitstream. Additionally, splitting the encoder and decoder allows them to be benchmarked separately for execution time.
A separate CHAN was created and initialized for the H.263 encoder and the H.263 decoder. At
3.2Adding the Control TSK and MBX Communication
The second change to the base example was the addition of a control TSK to send control commands to the process TSK using the MBX module from DSP/BIOS. A MBX object, mbxProcess, was added in the DSP/BIOS
8 | DSP/BIOS |