Texas Instruments 5611/13PHD2EVM setup guide Speaker Connection, Output configuration BTL and Pbtl

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Quick Setup Guide

 

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NOTE: If a single ended input signal is applied please insert jumpers in the header J24 and J25.

PVDD

 

 

 

 

 

 

(J15)

RESET

 

 

 

 

 

 

 

 

 

 

 

 

(SW11 )

 

 

 

 

 

 

+12 V FAN Regulator

DIFF￿INPUT DIFF￿INPUT

+12 V

Regulator

 

(J24)

(J25)

 

 

 

 

 

 

JUMPER1

JUMPER2

 

 

 

+12V￿FAN

SE LEFT

INPUT (J20)

SE RIGHT INPUT (J21)

 

 

 

OUT

 

 

 

CONTROL

 

 

 

(J22)

 

 

 

 

 

 

 

 

2.5Speaker Connection

CAUTION

Both positive and negative speaker outputs are floating and may not be connected to ground (e.g., through an oscilloscope).

2.6Output configuration BTL and PBTL

When changing mode e.g. from BTL to PBTL make sure that RESET switch (SW11) is activated before changing the state of mode switches SW1 and SW2. Switch SW1 and SW2 has to be synchronized in state BTL or PBTL.

Input signal to RCA connector J20 when operating PBTL mode. J21 is disabled. In PBTL mode, the load has to be connected according to Figure 3:

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TAS5611/13PHD2EVM

SLOU286 –December 2009

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Copyright © 2009, Texas Instruments Incorporated

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Contents TAS5611/13PHD2EVM Overview TAS5611/13PHD2EVM Features PCB Key MapPhysical Structure for the TAS53630PHDEVM Approximate Layout Electrostatic Discharge Warning Power Supply SetupApplying Input Signal Unpacking the EVMOutput configuration BTL and Pbtl Speaker ConnectionShort-Circuit Protection and Fault-Reporting Circuitry ProtectionFault Reporting Additional DocumentationEvaluation Board/Kit Important Notice TAS5613PHD2EVM Optional Status Monitor Mechanics TAS561113PHD2EVM Parts List 1.00.xls SCREW11 SCREW12 SCREW13 SCREW14 SCREW15 SCREW16 TAS5613PHD2EVM PCB Specification Page Page Page Page Page Page Page Page Page Company Confidential Inductor Specification Important Notice