Texas Instruments 5611/13PHD2EVM setup guide Electrostatic Discharge Warning, Unpacking the EVM

Page 5

www.ti.com

Quick Setup Guide

2Quick Setup Guide

This chapter describes the TAS5611/13PHD2EVM board in regards to power supply and system interfaces. The chapter provides information regarding handling and unpacking, absolute operating conditions, and a description of the factory default switch and jumper configuration.

This section provides a step–by–step guide to configuring the TAS5611/13PHD2EVM for device evaluation

2.1Electrostatic Discharge Warning

Many of the components on the TAS5611/13PHD2EVM are susceptible to damage by electrostatic discharge (ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation.

CAUTION

Failure to observe ESD handling procedures may result in damage to EVM components.

2.2Unpacking the EVM

On opening the TAS5611/13PHD2EVM package, ensure that the following items are included:

1 pc. TAS5611/13PHD2EVM board using one TAS5611PHD or one TAS5613PHD.

If any of the items are missing, contact the Texas Instruments Product Information Center nearest you to inquire about a replacement.

2.3Power Supply Setup

To power up the EVM, one power supply are needed. An onboard switched voltage regulator is supplying system power, logic and gate-drive. Power supply is connected to the EVM using connector J15.

NOTE: While powering up set switch SW11 to the RESET position.

Table 2. Recommended Supply Voltages

Description

Voltage Limitations

Current Requirement

Cable

TAS5613 Output stage power

18V

- 36V

16 A

J15 (marked PVDD)

supply

 

 

 

 

 

 

 

 

 

TAS5611 Output stage power

16V

- 32.5V

16A

J15 (marked PVDD)

supply

 

 

 

 

 

 

 

 

 

CAUTION

Applying voltages above the limitations given in Table 2 may cause permanent damage to your hardware

NOTE: The length of power supply cable must be minimized. Increasing length of PSU cable is equal to increasing the distortion for the amplifier at high output levels and low frequencies.

2.4Applying Input Signal

It is possible to apply either a single ended input signal to J20 and J21 or a differential input signal to J24 and J25.

SLOU286 –December 2009

TAS5611/13PHD2EVM

5

Submit Documentation Feedback

 

 

Copyright © 2009, Texas Instruments Incorporated

Image 5
Contents TAS5611/13PHD2EVM Overview PCB Key Map TAS5611/13PHD2EVM FeaturesPhysical Structure for the TAS53630PHDEVM Approximate Layout Applying Input Signal Power Supply SetupElectrostatic Discharge Warning Unpacking the EVMSpeaker Connection Output configuration BTL and PbtlProtection Short-Circuit Protection and Fault-Reporting CircuitryAdditional Documentation Fault ReportingEvaluation Board/Kit Important Notice TAS5613PHD2EVM Optional Status Monitor Mechanics TAS561113PHD2EVM Parts List 1.00.xls SCREW11 SCREW12 SCREW13 SCREW14 SCREW15 SCREW16 TAS5613PHD2EVM PCB Specification Page Page Page Page Page Page Page Page Page Company Confidential Inductor Specification Important Notice