AMD AN9 32X user manual Back to Advanced Chipset Features Setup Menu

DRAM Configuration:

Click <Enter> key to enter its submenu.

You may manually set the DRAM timing parameters through the following sub-items, or leave them at their default settings according to the SPD (Serial Presence Detect) data stored in the DRAM.

Phoenix – Award BIOS CMOS Setup Utility

DRAM Configuration

DRAM Timing Selectable			Auto			Item Help
X -	DRAM Clock		DDR2 533
-	DQS Timing Training		Skip DQS
-	CKE Base Power Down Mode		Enabled
-	CKE Base Power Down by		Channel
-	Memclock Tri-Stating		Disabled
X -	TwTr Command Delay		2 Clocks
X -	Trfc0 for DIMM1		105	ns
X -	Trfc1 for DIMM2		75	ns
X -	Trfc2 for DIMM3		75	ns
X -	Trfc3 for DIMM4		75	ns
X -	Write Recovery Time(Twr)		4 Clocks
X -	Precharge Time(Trtp)		2 Clocks
X -	Row Cycle Time(Trc)		17 Clocks
X -	RAS2CAS R/W Delay(Trcd)		4 Clocks
X -	RAS to RAS Delay(Trrd)		2 Clocks
X -	Row Precharge Time(Trp)		4 Clocks
X -	Min. RAS Act-Time(Tras)		12 Clocks
Memory Hole Remapping			Enabled
DRAM ECC Enable			Disabled
X -	DRAM MCE Enable		Disabled
X -	Chip-Kill Mode Enable		Disabled
X -	DRAM ECC Redirection		Disabled
X -	DRAM Scrub Rate		Disabled
X -	L2 Cache Scrub Rate		Disabled
X -	DCache Scrub Rate		Disabled
Auto Optimize Bottom IO			Enabled
X -	[31:24] IO Space		F0
↓↑→←:Move Enter:Select		+/-/PU/PD:Value F10:Save			ESC:Exit F1:General Help
	F5: Previous Values	F6: Fail-Safe Defaults			F7: Optimized Defaults

Back to Advanced Chipset Features Setup Menu:

SSE/SSE2 Instructions

This item allows you to Enable or Disable the SSE/SSE2 (Streaming SIMD Extensions) instruction set.

System BIOS Cacheable

This item enables or disables caching the system BIOS for faster execution.

NVIDIA GPU Ex

Stands for “GPU Extra Performance”. Enable this item to work for certain NVIDIA SLI graphics cards with certain driver version, but only minor performance will be expected. Leave this item at its default setting (Disabled).

3-16 AN9 32X