Preface

Thank you for purchasing the ADSP-21364 EZ-KIT Lite®, Analog Devices, Inc. evaluation system for SHARC® processors.

The SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large on-chip, dual-ported SRAM blocks coupled with a sophisticated IO pro- cessor, which gives a SHARC processor the bandwidth for sustained high-speed computations. SHARC processors represents today’s de facto standard for floating-point processor targeted for premium audio applications.

The evaluation system is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the ADSP-21364 SHARC processors. The VisualDSP++ development envi- ronment gives you the ability to perform advanced application code development and debug, such as:

•Create, compile, assemble, and link application programs written in C++, C, and ADSP-21364 assembly

•Load, run, step, halt, and set breakpoints in application program

•Read and write data and program memory

•Read and write core and peripheral registers

•Plot memory

ADSP-21364 EZ-KIT Lite Evaluation System Manual

ADSP-21364 specifications

The Analog Devices ADSP-21364 is a high-performance digital signal processor (DSP) specifically designed for demanding applications in audio, industrial, and communications sectors. It is well-regarded for its powerful processing capabilities, extensive connectivity options, and energy efficiency, making it an ideal choice for complex digital signal processing tasks.

One of the standout features of the ADSP-21364 is its dual Harvard architecture, which allows for simultaneous access to program and data memory. This capability significantly improves performance by reducing bottlenecks, enabling faster execution of algorithms. The processor boasts a clock speed of up to 300 MHz, ensuring it can handle a wide range of real-time signal processing tasks.

The ADSP-21364 is equipped with a rich set of on-chip memory resources, including 64KB of program RAM and 64KB of data RAM. This substantial memory allocation enables the storage of intricate algorithms and large datasets, ensuring that high-performance applications can be executed without the need for external memory, thus reducing latency and power consumption.

Another notable feature of this DSP is its advanced multiprocessing capabilities. The processor includes six processing engines, allowing for parallel processing of multiple tasks. This architecture is particularly beneficial for applications that require simultaneous processing of audio signals, such as digital mixing or effects processing, enhancing the overall throughput.

In terms of connectivity, the ADSP-21364 is equipped with a wide range of I/O options, including serial ports, parallel ports, and a high-speed synchronous port. This versatility facilitates seamless integration with other system components, making the processor an excellent choice for embedded systems that rely on external data sources.

The ADSP-21364 also supports various industry-standard digital audio interfaces, such as I2S and TDM, enabling straightforward interfacing with audio codecs and other digital audio devices. Moreover, it features built-in hardware accelerators for efficient filtering, Fast Fourier Transform (FFT), and interpolation tasks, thereby enhancing its ability to handle complex audio signal processing.

On the power consumption front, the ADSP-21364 is designed with energy efficiency in mind. Its architecture allows for low-power operation modes, which are crucial in battery-powered applications where energy conservation is a priority.

In conclusion, the Analog Devices ADSP-21364 DSP is a robust solution for high-performance digital signal processing needs. With its dual Harvard architecture, extensive memory resources, advanced multiprocessing capabilities, versatile connectivity options, and energy-efficient design, it stands out as a premier choice for a variety of applications in the fields of audio processing, telecommunications, and industrial automation.