Analog Devices ADSP-21364 system manual Processor Pin Mapped as Flag

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Using ADSP-21364 EZ-KIT Lite

The LEDs connect to the parallel port pins, AD7–0, via a latch. The parallel port of the processor can be set up as a memory bus or as general-purpose FLAG pins. The latch allows the LEDs to be written to in both cases. Infor- mation about setting up the latch can be found in “Push Button Enable Switch (SW9)” on page 2-11.

When the LEDs are accessed as FLAG pins, the latch must be set up to pass the data through to pins AD7–0of the processor. In this mode, it is also necessary to set up the parallel port to be FLAG pins. To set up the parallel port as FLAG pins, set the PPFLGS bit in the SYSCTL register.

Table 1-3summarizes the LED and FLAG connections.

Table 1-3. LED Connections

LED Reference Designator

Processor Pin

Mapped as FLAG

 

 

 

 

 

 

LED1

AD0

FLAG8

 

 

 

LED2

AD1

FLAG9

 

 

 

LED3

AD2

FLAG10

 

 

 

LED4

AD3

FLAG11

 

 

 

LED5

AD4

FLAG12

 

 

 

LED6

AD5

FLAG13

 

 

 

LED7

AD6

FLAG14

 

 

 

LED8

AD7

FLAG15

 

 

 

An example program is included in the EZ-KIT Lite installation directory to demonstrate the functionality of the LEDs and push buttons.

ADSP-21364 EZ-KIT Lite Evaluation System Manual

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Contents ADSP-21364 EZ-KIT Lite Evaluation System Manual Trademark and Service Mark Notice Limited WarrantyCopyright Information DisclaimerRegulatory Compliance Page Contents Using ADSP-21364 EZ-KIT Lite ADSP-21364 EZ-KIT Lite Evaluation System Manual Vii Index Preface Page Preface Purpose of This Manual Intended AudiencePurpose of This Manual Manual Contents What’s New in This Manual Technical or Customer SupportWhat’s New in This Manual Supported Processors Product InformationMyAnalog.com Processor Product Information Related DocumentsProduct Information Related VisualDSP++ Publications Online Technical DocumentationAccessing Documentation From Windows Accessing Documentation From VisualDSP++Accessing Documentation From Web Printed ManualsVisualDSP++ Documentation Set Notation Conventions Data SheetsNotation Conventions Hardware Tools Manuals Processor ManualsADSP-21364 EZ-KIT Lite Evaluation System Manual Xxi Notation Conventions Using ADSP-21364 EZ-KIT Lite Package Contents Using ADSP-21364 EZ-KIT Lite Default ConfigurationDefault Configuration Installation and Session Startup Installation and Session Startup External Memory Evaluation License Restrictions Analog Audio Analog AudioUsing ADSP-21364 EZ-KIT Lite LEDs and Push Buttons LEDs and Push ButtonsProcessor Pin Mapped as Flag Example Programs Background Telemetry ChannelExample Programs ADSP-21364 EZ-KIT Lite Hardware Reference System Architecture System ArchitectureADSP-21364 EZ-KIT Lite Hardware Reference Parallel PortDEC DAI Interface SPI Interface Flag PinsExpansion Interface IO Flag PinsJtag Emulation Port Electret Microphone Select Switch SW6 Switch SettingsSwitch Settings Codec Setup Switch SW7Push Button Enable Switch SW9 SPI Disable Switch SW8Boot Mode and Clock Ratio Select Switch SW10 Loop-Back Test Switch SW11 Power LED LED10 Reset LED LED9General Purpose LEDs LED8-1 USB Monitor LED ZLED3Push Buttons SW1-4 Board Reset Push Button SW5Connectors ConnectorsExpansion Interface J1-J3 Audio In RCA Connector J4 Audio Out RCA Connector J5Headphone Out Jack J6 Pdif Coax Connectors J8 and J9 Power Jack J7USB Connector ZJ1 SPI Header P2DAI Header P3 Jtag Header ZP4 ADSP-21364 EZ-KIT Lite Bill of Materials FDC658P ADSP-21364 EZ-KIT Lite Bill Of Materials Vishay CRCW080510K0JNEA Panasonic ERJ-8GEYJ101V Vishay CRCW12061K65FKEA Vishay CRCW080564K9FKEA Vishay CRCW1206100KFKEA ADSP-21364 EZ-KIT Lite Schematic Engineer to Engineer Note EE-68 which can be found at DSP OSCSram 2MbADC DAC1 DAC2 DAC3 DAC4 Disconnects Signals from SPI Flash and AD1835Right RED AD1835 AudioDAC1 Right DAC2 Right DAC1 Left DAC2 LeftDAC3 Right DAC4 Right DAC3 Left DAC4 LeftADC Right ADC Left DAC4Spdif Coax Input CoaxOUT Analog Expansion Interface Type a HeaderSPI Header FDC658P PowerIndex Index Pdif USB