Advantech AIMB-210 user manual Advanced Chipset Features

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Four delay rate options are 250, 500, 750 and 1000.

!Security Option [Setup]

System

System will not boot and refuses access to Setup page if the cor-

 

rect password is not entered at the prompt.

Setup

System will boot, but access to Setup requires password (default

 

value).

!APIC Mode [Enabled]

This item allows user to enabled of disabled “Advanced Programmable Interrupt Controller”. APIC is implemented in the motherboard and must be supported by the operating system, and it extends the number of IRQ's available.

3.2.4Advanced Chipset Features

Note! This “Advanced Chipset Features” page controls configuration of the board’s chipset. This page is chipset dependent; screens may differ somewhat depending on the chipset. It is strongly recommended that only technical users make changes to the default settings.

!DRAM Timing Selectable [By SPD]

This item enables users to set the optimal timings for items 2 through 5; system default setting “By SPD” follows the SPD information and ensures the system runs stably with optimal performance.

!CAS Latency Time [Auto]

This item enables users to set the timing delay in clock cycles before SDRAM starts a read command after receiving it.

!DRAM RAS# to CAS# Delay [Auto]

This item enables users to set the timing of the transition from RAS (row address strobe) to CAS (column address strobe) as both rows and column are separately addressed shortly after DRAM is refreshed.

!DRAM RAS# Precharge [Auto]

This item enables users to set the DRAM RAS# precharge timing, system default is setting to “Auto” to reference the data from SPD ROM.

!Precharge delay (tRAS) [Auto]

This item allows user to adjust memory precharge time.

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Contents AIMB-210 Copyright Acknowledgements Advantech Customer Services Message to the CustomerDeclaration of Conformity FCCMemory Compatibility Brand Size Speed Vendor PN Advantech PN MemoryProduct Warranty 2 years Ordering InformationInitial Inspection Viii Contents Chipset Software Installation Utility Appendix a Table B.24System I/O Ports Chapter Introduction FeaturesCost effective 945GSE chipset supports 533 Front side bus Specifications Jumpers and Connectors Industrial featuresMechanical and environmental specifications ConnectorsUSB56 Board layout Jumper and Connector Locations Jumper and Connector LocationAIMB-210 Board Diagram AIMB-210 Board DiagramSafety Precautions Jumper Settings How to Set JumpersCmos Clear CMOS1 CMOS13 COM2 RS 232/422/485 Mode Selector JSETCOM2 4 JLV1/JLV2 LCD Power 3.3 V/5 V SelectorCOM2 RS 232/422/485 Mode Selector JSETCOM2 JLV1/JLV2 LCD Power 3.3 V/5 V SelectorJPSON1 ATX, AT Mode Selector JWDT1 Watchdog Timer Output OptionJPSON1 ATX, AT Mode Selector JWDT1 Watchdog Timer Output OptionMemory Installation Procedures System MemoryConnecting Peripherals Parallel Port LPT1 Connecting Peripherals Primary IDE1 IDE ConnectorLAN LED Indicator USB Ports LAN1USB12/LAN2USB34/USB56/ USB78TV-Out Connector TVOUT1 TV-Out Connector TVOUT1VGA Connector VGA1 Serial Ports COM1~COM6 PS/2 Keyboard and Mouse Connector KBMS1 CPU Fan Connector CPUFAN1 System FAN Connector CHAFAN1 Front Panel Connectors JFP1/JFP2/JFP3 ATX soft power switch JFP1 / PwrswReset JFP1 / Reset HDD LED JFP2 / HddledPower LED and keyboard lock connector JFP3 / Pwrled ATX power supply LED status No support for AT powerLine In, Line Out, Mic In Connector AUDIO1 Serial ATA Interface SATA1, SATA2 14 PCI Front Headphone Connector FPAUD1 ATX Power Connector EATXPWR1 SPI Flash connectorSPICN1 LCD Inverter Connector INV1 & INV2 Optional Lvds Connector LVDS1 & LVDS2 Optional Digital I/O Connector DIO1 Page Bios Operation Bios Setup Control Keys Main Menu Standard Cmos Features Advanced Bios Features Advanced Chipset Features Dvmt Mode Dvmt Boot DisplaySystem Memory Frequency Auto PCI Express Root port Func Press EnterOnChip IDE Device Integrated PeripheralsOnboard Device Parallel Port Mode ECP+EPP EPP Mode Select EPP1.9ECP Mode Use DMA Super IO DeviceUSB Device Setting Security Chip Configuration Optional Item TPM Support Power Management Setup Suspend Mode Disabled PowerOn by LAN EnabledPowerOn by Modem Enabled USB KB WakeUp From S3 DisabledReset Configuration Data Disabled 10 PnP/PCI ConfigurationsResources Controlled By AutoESCD PC Health Status Frequency/Voltage ControlLoad Setup Defaults Set Password Bios Operation Save & Exit Setup Quit without SavingChipset Software Installation Utility Before You Begin Windows XP Driver Setup Page VGA Setup Windows Vista/XP/2000 LAN Configuration Installation Win XP/Vista Driver Setup Realtek RTL8111CAppendix a Watchdog Timer Overview Programming the Watchdog TimerProgramming the Watchdog Timer Appendix a Programming the Watchdog Timer Table A.1 Watchdog Timer Registers Address of Register 2E AttributeExample Program Page Appendix a Programming the Watchdog Timer Page Appendix B Table B.1 Parallel Port LPT1 USB Header USB56, USB78Table B.2 USB Header USB56 RS-232 Interface Table B.3 VGA Connector VGA1Table B.4 RS-232 Interface COM1~COM4 RS-232/422/485 Setting Interface JETCOM2 SPICN1 SPI Fresh Card Pin ConnectorTable B.5 RS-232/422/485 Setting Interface JETCOM2 Table B.6 SPICN1SPI Fresh Card Pin ConnectorTable B.7 PS/2 Keyboard and Mouse Connector KBMS1 CPU Fan Power Connector CPUFAN1Table B.8 CPU Fan Power Connector CPUFAN1 System Fan Power Connector CHAFAN1 Power LED & Keyboard Lock Connector JFP3Table B.9 System Fan Power Connector SYSFAN1/SYSFAN2 Table B.10 Power LED & Keyboard Lock Connector JFP3Table B.11 External Speaker Connector JFP2/SPEAKER Table B.12 Reset Connector JFP1/ ResetTable B.13 ATX Power Connector ATX2 14 USB/LAN ports LAN1USB12/LAN2USB34Table B.14 USB Port Table B.15 Ethernet 10/100 Mbps RJ-45 PortSerial ATA0/1 SATA1/SATA2 17 AT/ATX Mode PSON118 AC-97 Audio Interface FPAUD1 Table B.19 AT/ATX Mode PSON1 Gpio Pin Header GPIO1Table B.20 LVDS1 Connector Optional Table B.21 LVDS2 Connector Optional Lvds Power Jumper JLV1, JLV2Table B.22 Lvds Power Jumper Table B.23 Lvds Power Jumper Lvds Invert INV1 & INV2 OptionalSystem I/O Ports Table B.24 System I/O PortsInterrupt Assignments DMA Channel Assignments26 1st MB Memory Map Appendix B I/O Pin Assignments