Pico Communications E-14 manual CBCAD15

Page 24

 

 

 

 

 

 

 

 

24

 

 

CB_CAD15

 

D6

 

CardBus Data/Address 15

 

I/O

 

LV_TTL 3.3V

 

 

 

 

 

 

 

 

CB_CAD16

 

C7

 

CardBus Data/Address 16

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD17

 

J5

 

CardBus Data/Address 17

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD18

 

K6

 

CardBus Data/Address 18

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD19

 

E5

 

CardBus Data/Address 19

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD20

 

E6

 

CardBus Data/Address 20

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD21

 

E7

 

CardBus Data/Address 21

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD22

 

D9

 

CardBus Data/Address 22

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD23

 

C8

 

CardBus Data/Address 23

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD24

 

F10

 

CardBus Data/Address 24

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD25

 

G4

 

CardBus Data/Address 25

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD26

 

J3

 

CardBus Data/Address 26

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD27

 

L10

 

CardBus Data/Address 27

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD28

 

K8

 

CardBus Data/Address 28

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD29

 

F4

 

CardBus Data/Address 29

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD30

 

K11

 

CardBus Data/Address 30

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAD31

 

H9

 

CardBus Data/Address 31

 

I/O

 

LV_TTL 3.3V

 

 

CB_CAUDIO

 

H3

 

Card Audio Signal

 

O

 

LV_TTL 3.3V

 

 

CB_CBLOCK

 

B9

 

Card Lock

 

I/O

 

LV_TTL 3.3V

 

 

CB_CC/BE0

 

H4

 

Command and Byte Enables

 

I/O

 

LV_TTL 3.3V

 

 

CB_CC/BE1

 

C6

 

Command and Byte Enables

 

I/O

 

LV_TTL 3.3V

 

 

CB_CC/BE2

 

H6

 

Command and Byte Enables

 

I/O

 

LV_TTL 3.3V

 

 

CB_CC/BE3

 

D10

 

Command and Byte Enables

 

I/O

 

LV_TTL 3.3V

 

 

CB_CCLK

 

D11

 

Clock

 

I

 

LV_TTL 3.3V

 

 

CB_CCLKRUN

 

G10

 

Clock Request / Status

 

I/O

 

LV_TTL 3.3V

 

 

CB_CDEVSEL

 

G12

 

Device Select

 

I/O

 

LV_TTL 3.3V

 

 

CB_CFRAME

 

H8

 

Cycle Frame

 

I/O

 

LV_TTL 3.3V

 

 

CB_CGNT

 

A9

 

Grant

 

I

 

LV_TTL 3.3V

 

 

CB_CINT

 

B11

 

Card Interrupt Request

 

O

 

LV_TTL 3.3V

 

 

CB_CIRDY

 

G7

 

Initiator Ready

 

I/O

 

LV_TTL 3.3V

 

 

CB_CPAR

 

A7

 

Parity

 

I/O

 

LV_TTL 3.3V

 

 

CB_CPERR

 

A8

 

Parity Error

 

I/O

 

LV_TTL 3.3V

 

 

CB_CREQ

 

B10

 

Request

 

O

 

LV_TTL 3.3V

 

 

CB_CRST

 

D8

 

Card Reset

 

I

 

LV_TTL 3.3V

 

 

CB_CSERR

 

C9

 

System Error

 

O

 

LV_TTL 3.3V

 

 

CB_CSTOP

 

A10

 

Stop Transaction

 

I/O

 

LV_TTL 3.3V

 

 

CB_CSTSCHG

 

J9

 

Card Status Change

 

O

 

LV_TTL 3.3V

 

 

CB_CTRDY

 

E8

 

Target Ready

 

I/O

 

LV_TTL 3.3V

 

 

CB_RFU1

 

E3

 

CardBus: Reserved for Future Use

 

I/O

 

LV_TTL 3.3V

 

 

CB_RFU2

 

H7

 

CardBus: Reserved for Future Use

 

I/O

 

LV_TTL 3.3V

 

 

CB_RFU3

 

B7

 

CardBus: Reserved for Future Use

 

I/O

 

LV_TTL 3.3V

 

 

CPLD_TDI

 

R13

 

CPLD JTAG TDI

 

 

 

LV_TTL 3.3V

 

 

DAC_AMP_PWUP

 

K12

 

D/A Amplifier Power Up

 

O

 

LV_TTL 3.3V

 

 

DAC_CLK

 

H11

 

Clock

 

O

 

LV_TTL 3.3V

 

 

DAC_CLK‐

 

J11

 

Complementary Clock

 

O

 

LV_TTL 3.3V

 

 

DAC_CMODE

 

B6

 

Clock Mode Selection

 

O

 

LV_TTL 3.3V

 

 

E‐14 Hardware Reference Manual

 

www.picocomputing.com

 

 

 

Pico Computing, Inc.

Image 24
Contents ‐14 Contents FeaturesInterfaces AppendicesProduct Overview Pico E-14 EP Quick Reference Datasheet Pico E‐14 Electrical Specifications Power ConsumptionPower W Minimum Nominal MaximumSystem Architecture RAMField Programmable Gate Array Fpga ResourcesFpga Fabric DSP SlicePowerPC Processor PPC405x3 Processor IntroductionCpld TurboLoader Cpld ResourcesTri‐Mode Ethernet Interface Ethernet ResourcesFlash Memory Byte addresses Description Flash SectorsDDR2 Memory Analog Interface Optional ‐Bit, 80 Msps Analog‐to‐Digital Converter ADC‐Bit, 165 Msps Digital‐to‐Analog Converter DAC Serial Transceiver Specifications RS‐232 Serial TransceiverMax Connections Electrical Specifications Minimum Nominal Maximum Digital Peripheral InterfaceDiagen State CardBus Interface Pcmcia Interface ResourcesElectrical Specifications DC Minimum Nominal Maximum Digital Bus InterfaceJtag Debug Interface Device Instruction register bit lengthAppendix a Peripheral I/O Connector Information Connector InformationPeripheral I/O Connector Pinout Description Brand Part NumberAppendix B CardBus Connector Information CardBus Connector PinoutName Pin Description Dir CardBus Connector Pull Up and Pull Down Information Name Pin Description Value‐14 Hardware Reference Manual Appendix C Fpga Pinout Fpga PinoutCBCAD15 DACD0 Ethertxer FLASHD12 RAMA7 SSTL18IIDCI Ramloopback Appendix D Cpld Pinout Cpld PinoutNet Pin Description Direction C10 Sleep Mode Request Appendix E Standard Part Number Listing Standard Part Number ListingPico E‐14 EP Appendix F Errata All versionsAppendix G Fpga Performance Enhancements Part Resolution bits Speed Msps Low Power Appendix E Analog Interface Selection GuideRevision History 14.1.8.1114.1.8.12 Legal Notices

E-14 specifications

Pico Communications E-14 is an advanced wireless communication device designed to meet the demands of modern connectivity. As a versatile solution, it serves various applications in sectors such as telecommunications, IoT, and smart cities. The E-14 stands out for its compact design, exceptional performance, and robust feature set that cater to both individual users and enterprises.

One of the primary features of the Pico E-14 is its support for multiple communication protocols, including LTE, NB-IoT, and LoRaWAN. This multi-protocol capability ensures that users can select the most suitable option for their specific use case, whether it be high-speed data transfer or low-power wide-area networking. With seamless integration into existing infrastructure, the E-14 facilitates hassle-free deployments.

Power efficiency is another hallmark of the Pico E-14. Designed for longevity, the device includes intelligent power management features that drastically reduce energy consumption, making it an ideal choice for battery-operated devices and remote monitoring applications. This capability is particularly valuable in settings where maintenance access is limited, and downtime must be minimized.

The E-14’s built-in security features provide enhanced data protection, making it suitable for applications that require confidentiality and integrity. With end-to-end encryption, secure boot, and trusted platform modules, users can rest assured that their data remains protected against unauthorized access and cyber threats.

Moreover, the Pico E-14 boasts a user-friendly interface, which simplifies setup and operation. Its intuitive configuration tools allow users to quickly adjust settings and monitor performance metrics, reducing the need for specialized technical knowledge. This ease of use is a significant advantage in environments where teams may vary in technical expertise.

The device is also rugged and built to withstand harsh environmental conditions. Its robust casing protects against dust, moisture, and extreme temperatures, allowing it to function reliably in a variety of settings, from urban installations to remote field deployments.

With its array of features, the Pico Communications E-14 is well-positioned to play a pivotal role in the evolution of connectivity solutions. By offering flexible communication methods, energy efficiency, enhanced security, and user-friendly functionality, it addresses the complexities of modern communication needs while paving the way for innovative applications in the future.