Pico Communications E-14 manual Ethertxer

Page 26

 

 

 

 

 

 

 

 

26

 

 

ETHER_TX_ER

 

AA18

 

MII/GMII TX Error

 

I

 

LV_CMOS 2.5V

 

 

 

 

 

 

 

 

F\L\A\S\H\_\B\Y\T\E\

 

AD3

 

Inverted 8/16 Bit Mode Select

 

O

 

LV_CMOS 2.5V

 

 

F\L\A\S\H\_\O\E\

 

AA3

 

Inverted Output Enable

 

O

 

LV_CMOS 2.5V

 

 

F\L\A\S\H\_\R\E\S\E\T\

 

T3

 

Inverted Reset

 

O

 

LV_CMOS 2.5V

 

 

F\L\A\S\H\_\W\E\

 

W5

 

Inverted Write Enable

 

O

 

LV_CMOS 2.5V

 

 

F\L\A\S\H\_\W\P\

 

Y16

 

InvertedWrite Protect

 

O

 

LV_CMOS 2.5V

 

 

F\L\A\S\H\_C\E\

 

V3

 

Inverted Chip Enable

 

O

 

LV_CMOS 2.5V

 

 

F\P\G\A\_\P\R\O

 

K17

 

Inverted FPGA Program

 

O

 

LV_CMOS 2.5V

 

 

FLASH_A0

 

AD6

 

Address 0 [LSB]

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A1

 

AD8

 

Address 1

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A2

 

AD10

 

Address 2

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A3

 

AC11

 

Address 3

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A4

 

AD9

 

Address 4

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A5

 

Y3

 

Address 5

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A6

 

AC9

 

Address 6

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A7

 

V4

 

Address 7

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A8

 

P3

 

Address 8

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A9

 

U5

 

Address 9

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A10

 

P5

 

Address 10

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A11

 

AC4

 

Address 11

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A12

 

N4

 

Address 12

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A13

 

R5

 

Address 13

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A14

 

W3

 

Address 14

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A15

 

AA8

 

Address 15

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A16

 

AD4

 

Address 16

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A17

 

AD11

 

Address 17

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A18

 

AB6

 

Address 18

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A19

 

AC7

 

Address 19

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A20

 

AC6

 

Address 20

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A21

 

AB5

 

Address 21

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A22

 

AB11

 

Address 22

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A23

 

AB9

 

Address 23

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A24

 

AB4

 

Address 24

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_A25

 

AC3

 

Address 25 [MSB]

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D0

 

V12

 

Data 0 [LSB]

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D1

 

V13

 

Data 1

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D2

 

V14

 

Data 2

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D3

 

U14

 

Data 3

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D4

 

W13

 

Data 4

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D5

 

Y13

 

Data 5

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D6

 

W14

 

Data 6

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D7

 

W15

 

Data 7

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D8

 

V11

 

Data 8

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D9

 

W11

 

Data 9

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D10

 

U15

 

Data 10

 

I/O

 

LV_CMOS 2.5V

 

 

FLASH_D11

 

U16

 

Data 11

 

I/O

 

LV_CMOS 2.5V

 

 

E‐14 Hardware Reference Manual

 

www.picocomputing.com

 

 

 

Pico Computing, Inc.

Image 26
Contents ‐14 Interfaces ContentsFeatures AppendicesProduct Overview Pico E-14 EP Quick Reference Datasheet Power W Pico E‐14 Electrical SpecificationsPower Consumption Minimum Nominal MaximumSystem Architecture RAMFpga Fabric Field Programmable Gate ArrayFpga Resources DSP SlicePowerPC Processor PPC405x3 Processor IntroductionCpld TurboLoader Cpld ResourcesTri‐Mode Ethernet Interface Ethernet ResourcesFlash Memory Byte addresses Description Flash SectorsDDR2 Memory ‐Bit, 165 Msps Digital‐to‐Analog Converter DAC Analog Interface Optional‐Bit, 80 Msps Analog‐to‐Digital Converter ADC Max Connections Serial Transceiver SpecificationsRS‐232 Serial Transceiver Diagen State Electrical Specifications Minimum Nominal MaximumDigital Peripheral Interface CardBus Interface Pcmcia Interface ResourcesElectrical Specifications DC Minimum Nominal Maximum Digital Bus InterfaceJtag Debug Interface Device Instruction register bit lengthPeripheral I/O Connector Pinout Appendix a Peripheral I/O Connector InformationConnector Information Description Brand Part NumberName Pin Description Dir Appendix B CardBus Connector InformationCardBus Connector Pinout CardBus Connector Pull Up and Pull Down Information Name Pin Description Value‐14 Hardware Reference Manual Appendix C Fpga Pinout Fpga PinoutCBCAD15 DACD0 Ethertxer FLASHD12 RAMA7 SSTL18IIDCI Ramloopback Net Pin Description Direction Appendix D Cpld PinoutCpld Pinout C10 Sleep Mode Request Pico E‐14 EP Appendix E Standard Part Number ListingStandard Part Number Listing Appendix F Errata All versionsAppendix G Fpga Performance Enhancements Part Resolution bits Speed Msps Low Power Appendix E Analog Interface Selection Guide14.1.8.12 Revision History14.1.8.11 Legal Notices

E-14 specifications

Pico Communications E-14 is an advanced wireless communication device designed to meet the demands of modern connectivity. As a versatile solution, it serves various applications in sectors such as telecommunications, IoT, and smart cities. The E-14 stands out for its compact design, exceptional performance, and robust feature set that cater to both individual users and enterprises.

One of the primary features of the Pico E-14 is its support for multiple communication protocols, including LTE, NB-IoT, and LoRaWAN. This multi-protocol capability ensures that users can select the most suitable option for their specific use case, whether it be high-speed data transfer or low-power wide-area networking. With seamless integration into existing infrastructure, the E-14 facilitates hassle-free deployments.

Power efficiency is another hallmark of the Pico E-14. Designed for longevity, the device includes intelligent power management features that drastically reduce energy consumption, making it an ideal choice for battery-operated devices and remote monitoring applications. This capability is particularly valuable in settings where maintenance access is limited, and downtime must be minimized.

The E-14’s built-in security features provide enhanced data protection, making it suitable for applications that require confidentiality and integrity. With end-to-end encryption, secure boot, and trusted platform modules, users can rest assured that their data remains protected against unauthorized access and cyber threats.

Moreover, the Pico E-14 boasts a user-friendly interface, which simplifies setup and operation. Its intuitive configuration tools allow users to quickly adjust settings and monitor performance metrics, reducing the need for specialized technical knowledge. This ease of use is a significant advantage in environments where teams may vary in technical expertise.

The device is also rugged and built to withstand harsh environmental conditions. Its robust casing protects against dust, moisture, and extreme temperatures, allowing it to function reliably in a variety of settings, from urban installations to remote field deployments.

With its array of features, the Pico Communications E-14 is well-positioned to play a pivotal role in the evolution of connectivity solutions. By offering flexible communication methods, energy efficiency, enhanced security, and user-friendly functionality, it addresses the complexities of modern communication needs while paving the way for innovative applications in the future.