Pico Communications E-14 manual SSTL18IIDCI Ramloopback

Page 29

 

 

 

 

 

 

 

 

29

 

 

RAM_DM16‐23

 

L18

 

Data Mask [16‐23]

 

O

 

SSTL18_II_DCI

 

 

 

 

 

 

 

 

RAM_DM24‐31

 

N23

 

Data Mask [24‐31]

 

O

 

SSTL18_II_DCI

 

 

RAM_LOOPBACK

 

D13

 

Loopback Input

 

I

 

SSTL18_II_DCI

 

 

RAM_LOOPBACK

 

H17

 

Loopback Output

 

O

 

SSTL18_II_DCI

 

 

RAM_ODT0

 

J19

 

On‐Die Termination Enable 0

 

O

 

SSTL18_II_DCI

 

 

RAM_ODT1

 

D18

 

On‐Die Termination Enable 1

 

O

 

SSTL18_II_DCI

 

 

RAM_STROBE0

 

C18

 

Strobe D16‐D31 ‐ Bank 0

 

O

 

SSTL18_II_DCI

 

 

RAM_STROBE1

 

C17

 

Strobe D0‐D15 ‐ Bank 0

 

O

 

SSTL18_II_DCI

 

 

RAM_STROBE2

 

L23

 

Strobe D16‐D31 ‐ Bank 1

 

O

 

SSTL18_II_DCI

 

 

RAM_STROBE3

 

K22

 

Strobe D0‐D15 ‐ Bank 1

 

O

 

SSTL18_II_DCI

 

 

RS232‐EN

 

J13

 

Serial Transceiver Enable

 

O

 

LV_TTL 3.3V

 

 

RS232‐RX

 

M5

 

Serial Receive

 

O

 

LV_TTL 3.3V

 

 

RS232‐TX

 

L5

 

Serial Transmit

 

O

 

LV_TTL 3.3V

 

 

RS232‐VALID

 

L9

 

Serial Valid

 

I

 

LV_TTL 3.3V

 

 

SLEEP

 

U4

 

TurboLoader Sleep Request

 

O

 

LV_CMOS 2.5V

 

 

TCK

 

U10

 

JTAG TCK

 

O

 

LV_CMOS 2.5V

 

 

TDI

 

U11

 

JTAG TDI

 

I

 

LV_CMOS 2.5V

 

 

TMS

 

T10

 

JTAG TMS

 

O

 

LV_CMOS 2.5V

 

 

VRN1

 

F14

 

NOT CONNECTED

 

I/O

 

LV_CMOS 2.5V

 

 

VRN2

 

J24

 

NOT CONNECTED

 

I/O

 

LV_CMOS 2.5V

 

 

VRP1

 

F13

 

NOT CONNECTED

 

I/O

 

LV_CMOS 2.5V

 

 

VRP2

 

H23

 

NOT CONNECTED

 

I/O

 

LV_CMOS 2.5V

 

E‐14 Hardware Reference Manual

www.picocomputing.com

Pico Computing, Inc.

Image 29
Contents ‐14 Features ContentsInterfaces AppendicesProduct Overview Pico E-14 EP Quick Reference Datasheet Power Consumption Pico E‐14 Electrical SpecificationsPower W Minimum Nominal MaximumRAM System ArchitectureFpga Resources Field Programmable Gate ArrayFpga Fabric DSP SlicePPC405x3 Processor Introduction PowerPC ProcessorCpld Resources Cpld TurboLoaderEthernet Resources Tri‐Mode Ethernet InterfaceByte addresses Description Flash Sectors Flash MemoryDDR2 Memory ‐Bit, 165 Msps Digital‐to‐Analog Converter DAC Analog Interface Optional‐Bit, 80 Msps Analog‐to‐Digital Converter ADC Max Connections Serial Transceiver SpecificationsRS‐232 Serial Transceiver Diagen State Electrical Specifications Minimum Nominal MaximumDigital Peripheral Interface Pcmcia Interface Resources CardBus InterfaceDigital Bus Interface Electrical Specifications DC Minimum Nominal MaximumDevice Instruction register bit length Jtag Debug InterfaceConnector Information Appendix a Peripheral I/O Connector InformationPeripheral I/O Connector Pinout Description Brand Part NumberName Pin Description Dir Appendix B CardBus Connector InformationCardBus Connector Pinout Name Pin Description Value CardBus Connector Pull Up and Pull Down Information‐14 Hardware Reference Manual Fpga Pinout Appendix C Fpga PinoutCBCAD15 DACD0 Ethertxer FLASHD12 RAMA7 SSTL18IIDCI Ramloopback Net Pin Description Direction Appendix D Cpld PinoutCpld Pinout C10 Sleep Mode Request Pico E‐14 EP Appendix E Standard Part Number ListingStandard Part Number Listing All versions Appendix F ErrataAppendix G Fpga Performance Enhancements Appendix E Analog Interface Selection Guide Part Resolution bits Speed Msps Low Power14.1.8.12 Revision History14.1.8.11 Legal Notices

E-14 specifications

Pico Communications E-14 is an advanced wireless communication device designed to meet the demands of modern connectivity. As a versatile solution, it serves various applications in sectors such as telecommunications, IoT, and smart cities. The E-14 stands out for its compact design, exceptional performance, and robust feature set that cater to both individual users and enterprises.

One of the primary features of the Pico E-14 is its support for multiple communication protocols, including LTE, NB-IoT, and LoRaWAN. This multi-protocol capability ensures that users can select the most suitable option for their specific use case, whether it be high-speed data transfer or low-power wide-area networking. With seamless integration into existing infrastructure, the E-14 facilitates hassle-free deployments.

Power efficiency is another hallmark of the Pico E-14. Designed for longevity, the device includes intelligent power management features that drastically reduce energy consumption, making it an ideal choice for battery-operated devices and remote monitoring applications. This capability is particularly valuable in settings where maintenance access is limited, and downtime must be minimized.

The E-14’s built-in security features provide enhanced data protection, making it suitable for applications that require confidentiality and integrity. With end-to-end encryption, secure boot, and trusted platform modules, users can rest assured that their data remains protected against unauthorized access and cyber threats.

Moreover, the Pico E-14 boasts a user-friendly interface, which simplifies setup and operation. Its intuitive configuration tools allow users to quickly adjust settings and monitor performance metrics, reducing the need for specialized technical knowledge. This ease of use is a significant advantage in environments where teams may vary in technical expertise.

The device is also rugged and built to withstand harsh environmental conditions. Its robust casing protects against dust, moisture, and extreme temperatures, allowing it to function reliably in a variety of settings, from urban installations to remote field deployments.

With its array of features, the Pico Communications E-14 is well-positioned to play a pivotal role in the evolution of connectivity solutions. By offering flexible communication methods, energy efficiency, enhanced security, and user-friendly functionality, it addresses the complexities of modern communication needs while paving the way for innovative applications in the future.