Pico Communications E-14 manual RAMA7

Page 28

 

 

 

 

 

 

 

 

28

 

 

RAM_A7

 

E22

 

Address 7

 

O

 

SSTL18_II_DCI

 

 

 

 

 

 

 

 

RAM_A8

 

D24

 

Address 8

 

O

 

SSTL18_II_DCI

 

 

RAM_A9

 

F20

 

Address 9

 

O

 

SSTL18_II_DCI

 

 

RAM_A10

 

F23

 

Address 10

 

O

 

SSTL18_II_DCI

 

 

RAM_A11

 

A14

 

Address 11

 

O

 

SSTL18_II_DCI

 

 

RAM_A12

 

D23

 

Address 12 [MSB]

 

O

 

SSTL18_II_DCI

 

 

RAM_BA0

 

E23

 

Bank Address 0

 

O

 

SSTL18_II_DCI

 

 

RAM_BA1

 

K18

 

Bank Address 1

 

O

 

SSTL18_II_DCI

 

 

RAM_CLK

 

C14

 

Clock

 

O

 

SSTL18_II_DCI

 

 

RAM_CLK

 

F15

 

Clock Feedback

 

I

 

SSTL18_II_DCI

 

 

RAM_CLKE0

 

A15

 

Clock Enable 0[Power Save Mode]

 

O

 

SSTL18_II_DCI

 

 

RAM_CLKE1

 

G22

 

Clock Enable 1[Power Save Mode]

 

O

 

SSTL18_II_DCI

 

 

RAM_D0

 

C19

 

Data 0 (LSB)

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D1

 

F18

 

Data 1

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D2

 

G20

 

Data 2

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D3

 

D19

 

Data 3

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D4

 

C21

 

Data 4

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D5

 

E20

 

Data 5

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D6

 

F17

 

Data 6

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D7

 

B17

 

Data 7

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D8

 

D15

 

Data 8

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D9

 

D14

 

Data 9

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D10

 

C16

 

Data 10

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D11

 

A17

 

Data 11

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D12

 

G17

 

Data 12

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D13

 

B16

 

Data 13

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D14

 

C12

 

Data 14

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D15

 

B12

 

Data 15

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D16

 

H19

 

Data 16

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D17

 

H22

 

Data 17

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D18

 

G24

 

Data 18

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D19

 

H24

 

Data 19

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D20

 

J21

 

Data 20

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D21

 

G19

 

Data 21

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D22

 

K20

 

Data 22

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D23

 

K23

 

Data 23

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D24

 

M22

 

Data 24

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D25

 

M24

 

Data 25

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D26

 

K21

 

Data 26

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D27

 

L24

 

Data 27

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D28

 

N22

 

Data 28

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D29

 

L19

 

Data 29

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D30

 

N24

 

Data 30

 

I/O

 

SSTL18_II_DCI

 

 

RAM_D31

 

J23

 

Data 31

 

I/O

 

SSTL18_II_DCI

 

 

RAM_DM0‐7

 

E17

 

Data Mask [0‐7]

 

O

 

SSTL18_II_DCI

 

 

RAM_DM8‐15

 

C13

 

Data Mask [8‐15]

 

O

 

SSTL18_II_DCI

 

 

E‐14 Hardware Reference Manual

 

www.picocomputing.com

 

 

 

Pico Computing, Inc.

Page 27 Page 29
Image 28
Page 27 Page 29
Contents ‐14 Contents FeaturesInterfaces AppendicesProduct Overview Pico E-14 EP Quick Reference Datasheet Pico E‐14 Electrical Specifications Power ConsumptionPower W Minimum Nominal MaximumSystem Architecture RAMField Programmable Gate Array Fpga ResourcesFpga Fabric DSP SlicePowerPC Processor PPC405x3 Processor IntroductionCpld TurboLoader Cpld ResourcesTri‐Mode Ethernet Interface Ethernet ResourcesFlash Memory Byte addresses Description Flash SectorsDDR2 Memory ‐Bit, 80 Msps Analog‐to‐Digital Converter ADC Analog Interface Optional‐Bit, 165 Msps Digital‐to‐Analog Converter DAC RS‐232 Serial Transceiver Serial Transceiver SpecificationsMax Connections Digital Peripheral Interface Electrical Specifications Minimum Nominal MaximumDiagen State CardBus Interface Pcmcia Interface ResourcesElectrical Specifications DC Minimum Nominal Maximum Digital Bus InterfaceJtag Debug Interface Device Instruction register bit lengthAppendix a Peripheral I/O Connector Information Connector InformationPeripheral I/O Connector Pinout Description Brand Part NumberCardBus Connector Pinout Appendix B CardBus Connector InformationName Pin Description Dir CardBus Connector Pull Up and Pull Down Information Name Pin Description Value‐14 Hardware Reference Manual Appendix C Fpga Pinout Fpga PinoutCBCAD15 DACD0 Ethertxer FLASHD12 RAMA7 SSTL18IIDCI Ramloopback Cpld Pinout Appendix D Cpld PinoutNet Pin Description Direction C10 Sleep Mode Request Standard Part Number Listing Appendix E Standard Part Number ListingPico E‐14 EP Appendix F Errata All versionsAppendix G Fpga Performance Enhancements Part Resolution bits Speed Msps Low Power Appendix E Analog Interface Selection Guide14.1.8.11 Revision History14.1.8.12 Legal Notices

E-14 specifications

Pico Communications E-14 is an advanced wireless communication device designed to meet the demands of modern connectivity. As a versatile solution, it serves various applications in sectors such as telecommunications, IoT, and smart cities. The E-14 stands out for its compact design, exceptional performance, and robust feature set that cater to both individual users and enterprises.

One of the primary features of the Pico E-14 is its support for multiple communication protocols, including LTE, NB-IoT, and LoRaWAN. This multi-protocol capability ensures that users can select the most suitable option for their specific use case, whether it be high-speed data transfer or low-power wide-area networking. With seamless integration into existing infrastructure, the E-14 facilitates hassle-free deployments.

Power efficiency is another hallmark of the Pico E-14. Designed for longevity, the device includes intelligent power management features that drastically reduce energy consumption, making it an ideal choice for battery-operated devices and remote monitoring applications. This capability is particularly valuable in settings where maintenance access is limited, and downtime must be minimized.

The E-14’s built-in security features provide enhanced data protection, making it suitable for applications that require confidentiality and integrity. With end-to-end encryption, secure boot, and trusted platform modules, users can rest assured that their data remains protected against unauthorized access and cyber threats.

Moreover, the Pico E-14 boasts a user-friendly interface, which simplifies setup and operation. Its intuitive configuration tools allow users to quickly adjust settings and monitor performance metrics, reducing the need for specialized technical knowledge. This ease of use is a significant advantage in environments where teams may vary in technical expertise.

The device is also rugged and built to withstand harsh environmental conditions. Its robust casing protects against dust, moisture, and extreme temperatures, allowing it to function reliably in a variety of settings, from urban installations to remote field deployments.

With its array of features, the Pico Communications E-14 is well-positioned to play a pivotal role in the evolution of connectivity solutions. By offering flexible communication methods, energy efficiency, enhanced security, and user-friendly functionality, it addresses the complexities of modern communication needs while paving the way for innovative applications in the future.
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