SUPER MICRO Computer H8DCT-HLN4F user manual  ECC Configuration,  Dram Timing Configuration

Chapter 4: BIOS

Channel Interleaving

This option enables channel memory interleaving. Options include Auto or Disabled.

CS Sparing

This setting will reserve a spare memory rank in each node when enabled. Options are Enabled and Disabled.

Bank Swizzle Mode

This setting Enables or Disables the bank swizzle mode.

ECC Configuration

ECC Mode

This submenu affects the DRAM scrub rate based on its setting. Options include Disabled, Basic, Good, Super, Max and User. Selecting User activates the other options for user setting.

DRAM ECC Enable

This setting allows hardware to report and correct memory errors automatically, maintaining system integrity. Options are Enabled or Disabled. This is option is only active if ECC Mode above is set to User.

DRAM Timing Configuration

DRAM Timing Config

This option allows you to set the DRAM timing configuration for the system. Options include Auto or Manual.

Memory Clock Speed

This options sets the memory clock speed. Options include 200 Mhz, 266 Mhz, 333 Mhz, 400 Mhz, 533 Mhz, 667 Mhz, 800 Mhz and 933 Mhz.

HT Speed Support

Use this option to select the HT Link Frequency. Options include HT1 or Auto. Note that a Cold Reset is needed after changing this option's setting.

IOMMU

This setting is used to enable or disable or set the GART size in systems without AGP. Options include Enabled and Disabled.

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