SUPER MICRO Computer H8DCT-HLN4F user manual Checkpoint Code Description

H8DCT-HLN4F/HIBQF SERVERBOARD USER'S MANUAL

Checkpoint	Code Description
2Ah	Bus initialization system, static, output devices will be done next, if present. See the last page
	for additional information.
2Eh	Completed post-video ROM test processing. If the EGA/VGA controller is not found, performing
	the display memory read/write test next.
2Fh	The EGA/VGA controller was not found. The display memory read/write test is about to begin.
30h	The display memory read/write test passed. Look for retrace checking next.
31h	The display memory read/write test or retrace checking failed. Performing the alternate display
	memory read/write test next.
32h	The alternate display memory read/write test passed. Looking for alternate display retrace
	checking next.
34h	Video display checking is over. Setting the display mode next.
37h	The display mode is set. Displaying the power on message next.
38h	Initializing the bus input, IPL, general devices next, if present. See the last page of this chapter
	for additional information.
39h	Displaying bus initialization error messages. See the last page of this chapter for additional
	information.
3Ah	The new cursor position has been read and saved. Displaying the Hit <DEL> message next.
3Bh	The Hit <DEL> message is displayed. The protected mode memory test is about to start.
40h	Preparing the descriptor tables next.
42h	The descriptor tables are prepared. Entering protected mode for the memory test next.
43h	Entered protected mode. Enabling interrupts for diagnostics mode next.
44h	Interrupts enabled if the diagnostics switch is on. Initializing data to check memory wraparound
	at 0:0 next.
45h	Data initialized. Checking for memory wraparound at 0:0 and finding the total system memory
	size next.
46h	The memory wraparound test is done. Memory size calculation has been done. Writing patterns
	to test memory next.
47h	The memory pattern has been written to extended memory. Writing patterns to the base 640
	KB memory next.
48h	Patterns written in base memory. Determining the amount of memory below 1 MB next.
49h	The amount of memory below 1 MB has been found and verified.
4Bh	The amount of memory above 1 MB has been found and verified. Checking for a soft reset and
	clearing the memory below 1 MB for the soft reset next. If this is a power on situation, going to
	checkpoint 4Eh next.
4Ch	The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB
	next.
4Dh	The memory above 1 MB has been cleared via a soft reset. Saving the memory size next.
	Going to checkpoint 52h next.
4Eh	The memory test started, but not as the result of a soft reset. Displaying the first 64 KB memory
	size next.
4Fh	The memory size display has started. The display is updated during the memory test.
	Performing the sequential and random memory test next.
50h	The memory below 1 MB has been tested and initialized. Adjusting the displayed memory size
	for relocation and shadowing next.
51h	The memory size display was adjusted for relocation and shadowing.

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