Cypress STK16C88-3 manual Package Diagrams, Pin 600 Mil Pdip

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STK16C88-3

Package Diagrams

51-85017 *B

Document Number: 001-50594 Rev. **

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Contents Logic Block Diagram FeaturesFunctional Description Cypress Semiconductor Corporation 198 Champion CourtWrite Enable Input, Active LOW. When the chip is enabled Pin ConfigurationsOutput Enable, Active LOW. The active LOW Power Supply Inputs to the DeviceDevice Operation Hardware Recall Power UpSram Read Sram WriteHardware Protect Low Average Active PowerNoise Considerations Best Practices0x0E38 Read Sram Output Data Software STORE/RECALL Mode Selection 13 aRead Sram Output Data 0x03E0 Read Sram Output Data 0x303FMaximum Ratings DC Electrical CharacteristicsOperating Range Data Retention and EnduranceAC Test Conditions CapacitanceThermal Resistance Description Test Conditions Max UnitSwitching Waveforms AC Switching CharacteristicsSram Read Cycle Parameter Description 35 ns Unit Cypress Alt Min MaxData Setup to End of Write Chip Enable To End of WriteAddress Setup to End of Write Address Setup to Start of WritePower up Recall Duration AutoStorePlus or Power Up RecallLow Voltage Reset Level Parameter Alt Description STK16C88-3 Unit Min MaxParameter Alt Description 35 ns Unit Min Software Controlled STORE/RECALL CycleOrdering Information Part Numbering Nomenclature STK16C88 3W F 35Pin 600 Mil Pdip Package DiagramsWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions and Legal InformationNew data sheet Document History