Cypress CY7C1012DV33 manual

		CY7C1012DV33
Switching Waveforms (continued)
Figure 5. Write Cycle No. 1 (CE Controlled) [3, 16, 17]
	tWC
ADDRESS
	tSCE
CE
tSA	tSCE	tHA
tAW
WE	tPWE
	tSD	tHD
DATA I/O	DATA VALID
Figure 6. Write Cycle No. 2 (WE Controlled, OE HIGH During Write) [3, 16, 17]

		tWC
ADDRESS
		tSCE
CE
	tAW		tHA
	tSA	tPWE
WE
OE		tSD
	t		tHD
	HZOE
DATA I/O	NOTE 18	DATAIN VALID

Figure 7. Write Cycle No. 3 (WE Controlled, OE LOW) [3, 17]

		tWC
ADDRESS
		tSCE
CE
	tAW		tHA
	tSA	tPWE
WE
		tSD	tHD
DATA I/O	NOTE 18	DATA VALID
	tHZWE		tLZWE

Notes

16.Data I/O is high impedance if OE = VIH.

17.If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.

18.During this period, the I/Os are in output state. Do not apply input signals.

Document Number: 38-05610 Rev. *D Page 7 of 11

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