Cypress CY7C1334H manual Switching Waveforms, Read/Write Timing18, 19, Address A1 A2, DON’T Care

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CY7C1334H

Switching Waveforms

tCES tCEH

BW[A:D]

A3	A4	A5
	tCO

A6 A7

tAS tAH

tDS tDH

tCLZ

tDOH

tOEV tCHZ

Data

D(A1)

D(A2) D(A2+1) Q(A3) Q(A4)

tOEHZ

Q(A4+1) D(A5)

tDOH tOELZ

Q(A6)

DESELECT

Notes:

18.For this waveform ZZ is tied LOW.

19.When CE is LOW, CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH, CE1 is HIGH or CE2 is LOW or CE3 is HIGH.

20.Order of the Burst sequence is determined by the status of the MODE (0 = Linear, 1 = Interleaved). Burst operations are optional.

Document #: 38-05678 Rev. *B

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Contents Logic Block Diagram FeaturesCypress Semiconductor Corporation Selection Guide Pin ConfigurationMaximum Access Time tCO Maximum Operating Current IDD 166 MHz 133 MHz UnitPin Definitions Functional Overview First Second Third Fourth Address A1, A0 Operation Used Interleaved Burst Address Table Mode = Floating or VDDFirst Second Third Fourth Address A1, A0 ADV/LD CEN CLKFunction ZZ Mode Electrical CharacteristicsWrite Cycle Description2 BW D BW C BW B BW a Operating Range Maximum Rating Ambient Range Thermal Resistance11 Capacitance11AC Test Loads and Waveforms Switching Characteristics Over the Operating Range 12 Address A1 A2 Switching WaveformsRead/Write Timing18, 19 DON’T CareNOP, STALL, and Deselect Cycles18, 19 ZZ Mode Timing22DA4 Ordering Information Package DiagramPin Tqfp 14 x 20 x 1.4 mm Document History Issue Date Orig. Description of ChangeREV ECN no